Lines Matching refs:adc
6 * based on drivers/mfd/jz4740-adc.c
9 #include <dt-bindings/iio/adc/ingenic,adc.h>
102 int (*init_clk_div)(struct device *dev, struct ingenic_adc *adc);
116 struct ingenic_adc *adc = iio_priv(iio_dev);
118 mutex_lock(&adc->lock);
121 readl(adc->base + JZ_ADC_REG_ADCMD);
128 adc->base + JZ_ADC_REG_ADCMD);
134 adc->base + JZ_ADC_REG_ADCMD);
142 adc->base + JZ_ADC_REG_ADCMD);
148 adc->base + JZ_ADC_REG_ADCMD);
155 adc->base + JZ_ADC_REG_ADCMD);
160 adc->base + JZ_ADC_REG_ADCMD);
164 writel(0, adc->base + JZ_ADC_REG_ADCMD);
166 mutex_unlock(&adc->lock);
169 static void ingenic_adc_set_config(struct ingenic_adc *adc,
175 mutex_lock(&adc->lock);
177 cfg = readl(adc->base + JZ_ADC_REG_CFG) & ~mask;
179 writel(cfg, adc->base + JZ_ADC_REG_CFG);
181 mutex_unlock(&adc->lock);
184 static void ingenic_adc_enable_unlocked(struct ingenic_adc *adc,
190 val = readb(adc->base + JZ_ADC_REG_ENABLE);
197 writeb(val, adc->base + JZ_ADC_REG_ENABLE);
200 static void ingenic_adc_enable(struct ingenic_adc *adc,
204 mutex_lock(&adc->lock);
205 ingenic_adc_enable_unlocked(adc, engine, enabled);
206 mutex_unlock(&adc->lock);
209 static int ingenic_adc_capture(struct ingenic_adc *adc,
221 mutex_lock(&adc->lock);
222 cfg = readl(adc->base + JZ_ADC_REG_CFG);
223 writel(cfg & ~JZ_ADC_REG_CFG_CMD_SEL, adc->base + JZ_ADC_REG_CFG);
225 ingenic_adc_enable_unlocked(adc, engine, true);
226 ret = readb_poll_timeout(adc->base + JZ_ADC_REG_ENABLE, val,
229 ingenic_adc_enable_unlocked(adc, engine, false);
231 writel(cfg, adc->base + JZ_ADC_REG_CFG);
232 mutex_unlock(&adc->lock);
243 struct ingenic_adc *adc = iio_priv(iio_dev);
251 if (!adc->soc_data->battery_vref_mode)
254 ret = clk_enable(adc->clk);
262 ingenic_adc_set_config(adc,
265 adc->low_vref_mode = false;
267 ingenic_adc_set_config(adc,
270 adc->low_vref_mode = true;
273 clk_disable(adc->clk);
314 static int jz4725b_adc_init_clk_div(struct device *dev, struct ingenic_adc *adc)
320 parent_clk = clk_get_parent(adc->clk);
345 adc->base + JZ_ADC_REG_ADCLK);
350 static int jz4770_adc_init_clk_div(struct device *dev, struct ingenic_adc *adc)
356 parent_clk = clk_get_parent(adc->clk);
383 adc->base + JZ_ADC_REG_ADCLK);
613 struct ingenic_adc *adc = iio_priv(iio_dev);
618 *length = adc->soc_data->battery_raw_avail_size;
619 *vals = adc->soc_data->battery_raw_avail;
623 *length = adc->soc_data->battery_scale_avail_size;
624 *vals = adc->soc_data->battery_scale_avail;
636 struct ingenic_adc *adc = iio_priv(iio_dev);
638 ret = clk_enable(adc->clk);
646 mutex_lock(&adc->aux_lock);
647 if (adc->soc_data->has_aux_md && engine == 0) {
660 ingenic_adc_set_config(adc, JZ_ADC_REG_CFG_AUX_MD, cmd);
663 ret = ingenic_adc_capture(adc, engine);
671 *val = readw(adc->base + JZ_ADC_REG_ADSDAT);
674 *val = readw(adc->base + JZ_ADC_REG_ADBDAT);
680 mutex_unlock(&adc->aux_lock);
681 clk_disable(adc->clk);
692 struct ingenic_adc *adc = iio_priv(iio_dev);
706 if (adc->low_vref_mode) {
710 *val = adc->soc_data->battery_high_vref;
711 *val2 = adc->soc_data->battery_high_vref_bits;
746 struct ingenic_adc *adc = iio_priv(iio_dev);
749 ret = clk_enable(adc->clk);
758 ingenic_adc_set_config(adc, JZ_ADC_REG_CFG_TOUCH_OPS_MASK,
762 writew(80, adc->base + JZ_ADC_REG_ADWAIT);
763 writew(2, adc->base + JZ_ADC_REG_ADSAME);
764 writeb((u8)~JZ_ADC_IRQ_TOUCH, adc->base + JZ_ADC_REG_CTRL);
765 writel(0, adc->base + JZ_ADC_REG_ADTCH);
767 ingenic_adc_set_config(adc, JZ_ADC_REG_CFG_CMD_SEL,
771 ingenic_adc_enable(adc, 2, true);
778 struct ingenic_adc *adc = iio_priv(iio_dev);
780 ingenic_adc_enable(adc, 2, false);
782 ingenic_adc_set_config(adc, JZ_ADC_REG_CFG_CMD_SEL, 0);
784 writeb(0xff, adc->base + JZ_ADC_REG_CTRL);
785 writeb(0xff, adc->base + JZ_ADC_REG_STATUS);
786 ingenic_adc_set_config(adc, JZ_ADC_REG_CFG_TOUCH_OPS_MASK, 0);
787 writew(0, adc->base + JZ_ADC_REG_ADSAME);
788 writew(0, adc->base + JZ_ADC_REG_ADWAIT);
789 clk_disable(adc->clk);
802 struct ingenic_adc *adc = iio_priv(iio_dev);
809 tdat[i] = readl(adc->base + JZ_ADC_REG_ADTCH);
815 writeb(JZ_ADC_IRQ_TOUCH, adc->base + JZ_ADC_REG_STATUS);
824 struct ingenic_adc *adc;
832 iio_dev = devm_iio_device_alloc(dev, sizeof(*adc));
836 adc = iio_priv(iio_dev);
837 mutex_init(&adc->lock);
838 mutex_init(&adc->aux_lock);
839 adc->soc_data = soc_data;
852 adc->base = devm_platform_ioremap_resource(pdev, 0);
853 if (IS_ERR(adc->base))
854 return PTR_ERR(adc->base);
856 adc->clk = devm_clk_get_prepared(dev, "adc");
857 if (IS_ERR(adc->clk)) {
859 return PTR_ERR(adc->clk);
862 ret = clk_enable(adc->clk);
870 ret = soc_data->init_clk_div(dev, adc);
872 clk_disable_unprepare(adc->clk);
878 writeb(0x00, adc->base + JZ_ADC_REG_ENABLE);
879 writeb(0xff, adc->base + JZ_ADC_REG_CTRL);
883 ingenic_adc_set_config(adc, JZ_ADC_REG_CFG_VBAT_SEL,
886 ingenic_adc_set_config(adc, JZ_ADC_REG_CFG_VBAT_SEL, 0);
889 clk_disable(adc->clk);
891 iio_dev->name = "jz-adc";
906 { .compatible = "ingenic,jz4725b-adc", .data = &jz4725b_adc_soc_data, },
907 { .compatible = "ingenic,jz4740-adc", .data = &jz4740_adc_soc_data, },
908 { .compatible = "ingenic,jz4760-adc", .data = &jz4760_adc_soc_data, },
909 { .compatible = "ingenic,jz4760b-adc", .data = &jz4760_adc_soc_data, },
910 { .compatible = "ingenic,jz4770-adc", .data = &jz4770_adc_soc_data, },
917 .name = "ingenic-adc",