i2c/busses/i2c-synquacer.c

12 #include <linux/i2c.h>
148 static inline int is_lastmsg(struct synquacer_i2c *i2c)
150 	return i2c->msg_idx >= (i2c->msg_num - 1);
153 static inline int is_msglast(struct synquacer_i2c *i2c)
155 	return i2c->msg_ptr == (i2c->msg->len - 1);
158 static inline int is_msgend(struct synquacer_i2c *i2c)
160 	return i2c->msg_ptr >= i2c->msg->len;
163 static inline unsigned long calc_timeout_ms(struct synquacer_i2c *i2c,
176 static void synquacer_i2c_stop(struct synquacer_i2c *i2c, int ret)
183 	writeb(0, i2c->base + SYNQUACER_I2C_REG_BCR);
185 	i2c->state = STATE_IDLE;
187 	i2c->msg_ptr = 0;
188 	i2c->msg = NULL;
189 	i2c->msg_idx++;
190 	i2c->msg_num = 0;
192 		i2c->msg_idx = ret;
194 	complete(&i2c->completion);
197 static void synquacer_i2c_hw_init(struct synquacer_i2c *i2c)
200 	u32 rt = i2c->pclkrate;
203 	writeb(0, i2c->base + SYNQUACER_I2C_REG_ADR);
206 	writeb(SYNQUACER_I2C_BUS_CLK_FR(i2c->pclkrate),
207 	       i2c->base + SYNQUACER_I2C_REG_FSR);
209 	switch (i2c->speed_khz) {
211 		if (i2c->pclkrate <= SYNQUACER_I2C_CLK_RATE_18M) {
222 		       i2c->base + SYNQUACER_I2C_REG_CCR);
223 		writeb(csr_cs, i2c->base + SYNQUACER_I2C_REG_CSR);
226 		if (i2c->pclkrate <= SYNQUACER_I2C_CLK_RATE_18M) {
236 		      i2c->base + SYNQUACER_I2C_REG_CCR);
237 		writeb(csr_cs, i2c->base + SYNQUACER_I2C_REG_CSR);
244 	writeb(0, i2c->base + SYNQUACER_I2C_REG_BCR);
245 	writeb(0, i2c->base + SYNQUACER_I2C_REG_BC2R);
248 static void synquacer_i2c_hw_reset(struct synquacer_i2c *i2c)
251 	writeb(0, i2c->base + SYNQUACER_I2C_REG_CCR);
252 	writeb(0, i2c->base + SYNQUACER_I2C_REG_CSR);
254 	WAIT_PCLK(100, i2c->pclkrate);
257 static int synquacer_i2c_master_start(struct synquacer_i2c *i2c,
262 	writeb(i2c_8bit_addr_from_msg(pmsg), i2c->base + SYNQUACER_I2C_REG_DAR);
264 	dev_dbg(i2c->dev, "slave:0x%02x\n", pmsg->addr);
267 	bsr = readb(i2c->base + SYNQUACER_I2C_REG_BSR);
268 	bcr = readb(i2c->base + SYNQUACER_I2C_REG_BCR);
269 	dev_dbg(i2c->dev, "bsr:0x%02x, bcr:0x%02x\n", bsr, bcr);
273 		dev_dbg(i2c->dev, "bus is busy");
278 		dev_dbg(i2c->dev, "Continuous Start");
280 		       i2c->base + SYNQUACER_I2C_REG_BCR);
283 			dev_dbg(i2c->dev, "not in master mode");
286 		dev_dbg(i2c->dev, "Start Condition");
290 		       i2c->base + SYNQUACER_I2C_REG_BCR);
293 	WAIT_PCLK(10, i2c->pclkrate);
296 	bsr = readb(i2c->base + SYNQUACER_I2C_REG_BSR);
297 	bcr = readb(i2c->base + SYNQUACER_I2C_REG_BCR);
298 	dev_dbg(i2c->dev, "bsr:0x%02x, bcr:0x%02x\n", bsr, bcr);
302 		dev_dbg(i2c->dev, "arbitration lost\n");
309 static int synquacer_i2c_doxfer(struct synquacer_i2c *i2c,
316 	synquacer_i2c_hw_init(i2c);
317 	bsr = readb(i2c->base + SYNQUACER_I2C_REG_BSR);
319 		dev_err(i2c->dev, "cannot get bus (bus busy)\n");
323 	reinit_completion(&i2c->completion);
325 	i2c->msg = msgs;
326 	i2c->msg_num = num;
327 	i2c->msg_ptr = 0;
328 	i2c->msg_idx = 0;
329 	i2c->state = STATE_START;
331 	ret = synquacer_i2c_master_start(i2c, i2c->msg);
333 		dev_dbg(i2c->dev, "Address failed: (%d)\n", ret);
337 	time_left = wait_for_completion_timeout(&i2c->completion,
338 						msecs_to_jiffies(i2c->timeout_ms));
340 		dev_dbg(i2c->dev, "timeout\n");
344 	ret = i2c->msg_idx;
346 		dev_dbg(i2c->dev, "incomplete xfer (%d)\n", ret);
351 	udelay(DIV_ROUND_UP(2 * 1000, i2c->speed_khz));
358 	struct synquacer_i2c *i2c = dev_id;
364 	bcr = readb(i2c->base + SYNQUACER_I2C_REG_BCR);
365 	bsr = readb(i2c->base + SYNQUACER_I2C_REG_BSR);
366 	dev_dbg(i2c->dev, "bsr:0x%02x, bcr:0x%02x\n", bsr, bcr);
369 		dev_err(i2c->dev, "bus error\n");
370 		synquacer_i2c_stop(i2c, -EAGAIN);
375 		dev_dbg(i2c->dev, "arbitration lost\n");
376 		synquacer_i2c_stop(i2c, -EAGAIN);
380 	switch (i2c->state) {
383 			dev_dbg(i2c->dev, "ack was not received\n");
384 			synquacer_i2c_stop(i2c, -EAGAIN);
388 		if (i2c->msg->flags & I2C_M_RD)
389 			i2c->state = STATE_READ;
391 			i2c->state = STATE_WRITE;
393 		if (is_lastmsg(i2c) && i2c->msg->len == 0) {
394 			synquacer_i2c_stop(i2c, 0);
398 		if (i2c->state == STATE_READ)
404 			dev_dbg(i2c->dev, "WRITE: No Ack\n");
405 			synquacer_i2c_stop(i2c, -EAGAIN);
409 		if (!is_msgend(i2c)) {
410 			writeb(i2c->msg->buf[i2c->msg_ptr++],
411 			       i2c->base + SYNQUACER_I2C_REG_DAR);
417 			       i2c->base + SYNQUACER_I2C_REG_BCR);
420 		if (is_lastmsg(i2c)) {
421 			synquacer_i2c_stop(i2c, 0);
424 		dev_dbg(i2c->dev, "WRITE: Next Message\n");
426 		i2c->msg_ptr = 0;
427 		i2c->msg_idx++;
428 		i2c->msg++;
431 		ret = synquacer_i2c_master_start(i2c, i2c->msg);
433 			dev_dbg(i2c->dev, "restart error (%d)\n", ret);
434 			synquacer_i2c_stop(i2c, -EAGAIN);
437 		i2c->state = STATE_START;
441 		byte = readb(i2c->base + SYNQUACER_I2C_REG_DAR);
443 			i2c->msg->buf[i2c->msg_ptr++] = byte;
445 			dev_dbg(i2c->dev, "address:0x%02x. ignore it.\n", byte);
448 		if (is_msglast(i2c)) {
452 			       i2c->base + SYNQUACER_I2C_REG_BCR);
455 		if (!is_msgend(i2c)) {
460 			       i2c->base + SYNQUACER_I2C_REG_BCR);
463 		if (is_lastmsg(i2c)) {
465 			dev_dbg(i2c->dev, "READ: Send Stop\n");
466 			synquacer_i2c_stop(i2c, 0);
469 		dev_dbg(i2c->dev, "READ: Next Transfer\n");
471 		i2c->msg_ptr = 0;
472 		i2c->msg_idx++;
473 		i2c->msg++;
475 		ret = synquacer_i2c_master_start(i2c, i2c->msg);
477 			dev_dbg(i2c->dev, "restart error (%d)\n", ret);
478 			synquacer_i2c_stop(i2c, -EAGAIN);
480 			i2c->state = STATE_START;
484 		dev_err(i2c->dev, "called in err STATE (%d)\n", i2c->state);
489 	WAIT_PCLK(10, i2c->pclkrate);
496 	struct synquacer_i2c *i2c;
500 	i2c = i2c_get_adapdata(adap);
501 	i2c->timeout_ms = calc_timeout_ms(i2c, msgs, num);
503 	dev_dbg(i2c->dev, "calculated timeout %d ms\n", i2c->timeout_ms);
506 		ret = synquacer_i2c_doxfer(i2c, msgs, num);
510 		dev_dbg(i2c->dev, "Retrying transmission (%d)\n", retry);
512 		synquacer_i2c_hw_reset(i2c);
536 	struct synquacer_i2c *i2c;
541 	i2c = devm_kzalloc(&pdev->dev, sizeof(*i2c), GFP_KERNEL);
542 	if (!i2c)
551 				 &i2c->pclkrate);
559 		i2c->pclkrate = clk_get_rate(pclk);
561 	if (i2c->pclkrate < SYNQUACER_I2C_MIN_CLK_RATE ||
562 	    i2c->pclkrate > SYNQUACER_I2C_MAX_CLK_RATE)
565 				     i2c->pclkrate);
567 	i2c->base = devm_platform_ioremap_resource(pdev, 0);
568 	if (IS_ERR(i2c->base))
569 		return PTR_ERR(i2c->base);
571 	i2c->irq = platform_get_irq(pdev, 0);
572 	if (i2c->irq < 0)
573 		return i2c->irq;
575 	ret = devm_request_irq(&pdev->dev, i2c->irq, synquacer_i2c_isr,
576 			       0, dev_name(&pdev->dev), i2c);
578 		return dev_err_probe(&pdev->dev, ret, "cannot claim IRQ %d\n", i2c->irq);
580 	i2c->state = STATE_IDLE;
581 	i2c->dev = &pdev->dev;
582 	i2c->adapter = synquacer_i2c_ops;
583 	i2c_set_adapdata(&i2c->adapter, i2c);
584 	i2c->adapter.dev.parent = &pdev->dev;
585 	i2c->adapter.dev.of_node = pdev->dev.of_node;
586 	ACPI_COMPANION_SET(&i2c->adapter.dev, ACPI_COMPANION(&pdev->dev));
587 	i2c->adapter.nr = pdev->id;
588 	init_completion(&i2c->completion);
591 		i2c->speed_khz = SYNQUACER_I2C_SPEED_SM;
593 		i2c->speed_khz = SYNQUACER_I2C_SPEED_FM;
595 	synquacer_i2c_hw_init(i2c);
597 	ret = i2c_add_numbered_adapter(&i2c->adapter);
599 		return dev_err_probe(&pdev->dev, ret, "failed to add bus to i2c core\n");
601 	platform_set_drvdata(pdev, i2c);
604 		 dev_name(&i2c->adapter.dev));
611 	struct synquacer_i2c *i2c = platform_get_drvdata(pdev);
613 	i2c_del_adapter(&i2c->adapter);
617 	{ .compatible = "socionext,synquacer-i2c" },