i2c/busses/i2c-mxs.c

16 #include <linux/i2c.h>
29 #define DRIVER_NAME "mxs-i2c"
69 #define MXS_I2C_DATA(i2c)	((i2c->dev_type == MXS_I2C_V1) ? 0x60 : 0xa0)
71 #define MXS_I2C_DEBUG0_CLR(i2c)	((i2c->dev_type == MXS_I2C_V1) ? 0x78 : 0xb8)
110  * @adapter: i2c subsystem adapter node
132 static int mxs_i2c_reset(struct mxs_i2c_dev *i2c)
134 	int ret = stmp_reset_block(i2c->regs);
145 	writel(i2c->timing0, i2c->regs + MXS_I2C_TIMING0);
146 	writel(i2c->timing1, i2c->regs + MXS_I2C_TIMING1);
147 	writel(i2c->timing2, i2c->regs + MXS_I2C_TIMING2);
149 	writel(MXS_I2C_IRQ_MASK << 8, i2c->regs + MXS_I2C_CTRL1_SET);
154 static void mxs_i2c_dma_finish(struct mxs_i2c_dev *i2c)
156 	if (i2c->dma_read) {
157 		dma_unmap_sg(i2c->dev, &i2c->sg_io[0], 1, DMA_TO_DEVICE);
158 		dma_unmap_sg(i2c->dev, &i2c->sg_io[1], 1, DMA_FROM_DEVICE);
160 		dma_unmap_sg(i2c->dev, i2c->sg_io, 2, DMA_TO_DEVICE);
166 	struct mxs_i2c_dev *i2c = param;
168 	complete(&i2c->cmd_complete);
169 	mxs_i2c_dma_finish(i2c);
176 	struct mxs_i2c_dev *i2c = i2c_get_adapdata(adap);
178 	i2c->addr_data = i2c_8bit_addr_from_msg(msg);
181 		i2c->dma_read = true;
188 		i2c->pio_data[0] = MXS_CMD_I2C_SELECT;
189 		desc = dmaengine_prep_slave_sg(i2c->dmach,
190 					(struct scatterlist *)&i2c->pio_data[0],
193 			dev_err(i2c->dev,
199 		sg_init_one(&i2c->sg_io[0], &i2c->addr_data, 1);
200 		dma_map_sg(i2c->dev, &i2c->sg_io[0], 1, DMA_TO_DEVICE);
201 		desc = dmaengine_prep_slave_sg(i2c->dmach, &i2c->sg_io[0], 1,
206 			dev_err(i2c->dev,
216 		i2c->pio_data[1] = flags | MXS_CMD_I2C_READ |
218 		desc = dmaengine_prep_slave_sg(i2c->dmach,
219 					(struct scatterlist *)&i2c->pio_data[1],
222 			dev_err(i2c->dev,
228 		sg_init_one(&i2c->sg_io[1], buf, msg->len);
229 		dma_map_sg(i2c->dev, &i2c->sg_io[1], 1, DMA_FROM_DEVICE);
230 		desc = dmaengine_prep_slave_sg(i2c->dmach, &i2c->sg_io[1], 1,
235 			dev_err(i2c->dev,
240 		i2c->dma_read = false;
247 		i2c->pio_data[0] = flags | MXS_CMD_I2C_WRITE |
249 		desc = dmaengine_prep_slave_sg(i2c->dmach,
250 					(struct scatterlist *)&i2c->pio_data[0],
253 			dev_err(i2c->dev,
259 		sg_init_table(i2c->sg_io, 2);
260 		sg_set_buf(&i2c->sg_io[0], &i2c->addr_data, 1);
261 		sg_set_buf(&i2c->sg_io[1], buf, msg->len);
262 		dma_map_sg(i2c->dev, i2c->sg_io, 2, DMA_TO_DEVICE);
263 		desc = dmaengine_prep_slave_sg(i2c->dmach, i2c->sg_io, 2,
268 			dev_err(i2c->dev,
279 	desc->callback_param = i2c;
283 	dma_async_issue_pending(i2c->dmach);
288 	dma_unmap_sg(i2c->dev, &i2c->sg_io[1], 1, DMA_FROM_DEVICE);
290 	dma_unmap_sg(i2c->dev, &i2c->sg_io[0], 1, DMA_TO_DEVICE);
292 	dmaengine_terminate_sync(i2c->dmach);
297 	dma_unmap_sg(i2c->dev, i2c->sg_io, 2, DMA_TO_DEVICE);
299 	dmaengine_terminate_sync(i2c->dmach);
303 static int mxs_i2c_pio_wait_xfer_end(struct mxs_i2c_dev *i2c)
307 	while (readl(i2c->regs + MXS_I2C_CTRL0) & MXS_I2C_CTRL0_RUN) {
308 		if (readl(i2c->regs + MXS_I2C_CTRL1) &
319 static int mxs_i2c_pio_check_error_state(struct mxs_i2c_dev *i2c)
323 	state = readl(i2c->regs + MXS_I2C_CTRL1_CLR) & MXS_I2C_IRQ_MASK;
326 		i2c->cmd_err = -ENXIO;
331 		i2c->cmd_err = -EIO;
333 	return i2c->cmd_err;
336 static void mxs_i2c_pio_trigger_cmd(struct mxs_i2c_dev *i2c, u32 cmd)
340 	writel(cmd, i2c->regs + MXS_I2C_CTRL0);
343 	reg = readl(i2c->regs + MXS_I2C_CTRL0);
345 	writel(reg, i2c->regs + MXS_I2C_CTRL0);
356 static void mxs_i2c_pio_trigger_write_cmd(struct mxs_i2c_dev *i2c, u32 cmd,
359 	writel(cmd, i2c->regs + MXS_I2C_CTRL0);
361 	if (i2c->dev_type == MXS_I2C_V1)
362 		writel(MXS_I2C_CTRL0_PIO_MODE, i2c->regs + MXS_I2C_CTRL0_SET);
364 	writel(data, i2c->regs + MXS_I2C_DATA(i2c));
365 	writel(MXS_I2C_CTRL0_RUN, i2c->regs + MXS_I2C_CTRL0_SET);
371 	struct mxs_i2c_dev *i2c = i2c_get_adapdata(adap);
378 	writel(MXS_I2C_IRQ_MASK << 8, i2c->regs + MXS_I2C_CTRL1_CLR);
413 		mxs_i2c_pio_trigger_write_cmd(i2c, MXS_CMD_I2C_SELECT,
416 		ret = mxs_i2c_pio_wait_xfer_end(i2c);
418 			dev_dbg(i2c->dev,
424 		mxs_i2c_pio_trigger_cmd(i2c,
428 		ret = mxs_i2c_pio_wait_xfer_end(i2c);
430 			dev_dbg(i2c->dev,
435 		data = readl(i2c->regs + MXS_I2C_DATA(i2c));
505 			dev_dbg(i2c->dev,
513 			       i2c->regs + MXS_I2C_DEBUG0_CLR(i2c));
515 			mxs_i2c_pio_trigger_write_cmd(i2c,
524 			ret = mxs_i2c_pio_wait_xfer_end(i2c);
526 				dev_dbg(i2c->dev,
532 			ret = readl(i2c->regs + MXS_I2C_STAT) &
542 	ret = mxs_i2c_pio_check_error_state(i2c);
546 	writel(MXS_I2C_IRQ_MASK, i2c->regs + MXS_I2C_CTRL1_CLR);
547 	writel(MXS_I2C_IRQ_MASK << 8, i2c->regs + MXS_I2C_CTRL1_SET);
550 	if (i2c->dev_type == MXS_I2C_V1)
551 		writel(MXS_I2C_CTRL0_PIO_MODE, i2c->regs + MXS_I2C_CTRL0_CLR);
562 	struct mxs_i2c_dev *i2c = i2c_get_adapdata(adap);
571 	dev_dbg(i2c->dev, "addr: 0x%04x, len: %d, flags: 0x%x, stop: %d\n",
584 	i2c->cmd_err = 0;
589 			mxs_i2c_reset(i2c);
595 		reinit_completion(&i2c->cmd_complete);
602 		time_left = wait_for_completion_timeout(&i2c->cmd_complete,
608 		ret = i2c->cmd_err;
617 		       i2c->regs + MXS_I2C_CTRL1_SET);
631 	if (i2c->dev_type == MXS_I2C_V1)
632 		mxs_i2c_reset(i2c);
634 	dev_dbg(i2c->dev, "Done with err=%d\n", ret);
639 	dev_dbg(i2c->dev, "Timeout!\n");
640 	mxs_i2c_dma_finish(i2c);
641 	ret = mxs_i2c_reset(i2c);
670 	struct mxs_i2c_dev *i2c = dev_id;
671 	u32 stat = readl(i2c->regs + MXS_I2C_CTRL1) & MXS_I2C_IRQ_MASK;
677 		i2c->cmd_err = -ENXIO;
682 		i2c->cmd_err = -EIO;
684 	writel(stat, i2c->regs + MXS_I2C_CTRL1_CLR);
698 static void mxs_i2c_derive_timing(struct mxs_i2c_dev *i2c, uint32_t speed)
705 	struct device *dev = i2c->dev;
768 	i2c->timing0 = (high_count << 16) | rcv_count;
769 	i2c->timing1 = (low_count << 16) | xmit_count;
770 	i2c->timing2 = (bus_free << 16 | leadin);
773 static int mxs_i2c_get_ofdata(struct mxs_i2c_dev *i2c)
776 	struct device *dev = i2c->dev;
786 	mxs_i2c_derive_timing(i2c, speed);
792 	{ .compatible = "fsl,imx23-i2c", .data = (void *)MXS_I2C_V1, },
793 	{ .compatible = "fsl,imx28-i2c", .data = (void *)MXS_I2C_V2, },
801 	struct mxs_i2c_dev *i2c;
805 	i2c = devm_kzalloc(dev, sizeof(*i2c), GFP_KERNEL);
806 	if (!i2c)
809 	i2c->dev_type = (uintptr_t)of_device_get_match_data(&pdev->dev);
811 	i2c->regs = devm_platform_ioremap_resource(pdev, 0);
812 	if (IS_ERR(i2c->regs))
813 		return PTR_ERR(i2c->regs);
819 	err = devm_request_irq(dev, irq, mxs_i2c_isr, 0, dev_name(dev), i2c);
823 	i2c->dev = dev;
825 	init_completion(&i2c->cmd_complete);
828 		err = mxs_i2c_get_ofdata(i2c);
834 	i2c->dmach = dma_request_chan(dev, "rx-tx");
835 	if (IS_ERR(i2c->dmach)) {
836 		return dev_err_probe(dev, PTR_ERR(i2c->dmach),
840 	platform_set_drvdata(pdev, i2c);
843 	err = mxs_i2c_reset(i2c);
847 	adap = &i2c->adapter;
855 	i2c_set_adapdata(adap, i2c);
859 				i2c->regs + MXS_I2C_CTRL0_SET);
868 	struct mxs_i2c_dev *i2c = platform_get_drvdata(pdev);
870 	i2c_del_adapter(&i2c->adapter);
872 	if (i2c->dmach)
873 		dma_release_channel(i2c->dmach);
875 	writel(MXS_I2C_CTRL0_SFTRST, i2c->regs + MXS_I2C_CTRL0_SET);