i2c/busses/i2c-mpc.c

3  * This is a combined i2c adapter and algorithm driver for the
25 #include <linux/i2c.h>
109 	void (*setup)(struct device_node *node, struct mpc_i2c *i2c, u32 clock);
112 static inline void writeccr(struct mpc_i2c *i2c, u32 x)
114 	writeb(x, i2c->base + MPC_I2C_CR);
122 static void mpc_i2c_fixup(struct mpc_i2c *i2c)
128 		writeccr(i2c, 0);
129 		writeb(0, i2c->base + MPC_I2C_SR); /* clear any status bits */
130 		writeccr(i2c, CCR_MEN | CCR_MSTA); /* START */
131 		readb(i2c->base + MPC_I2C_DR); /* init xfer */
134 		writeccr(i2c, CCR_MEN | CCR_MSTA | CCR_RSTA); /* delay SDA */
135 		readb(i2c->base + MPC_I2C_DR);
140 	writeccr(i2c, CCR_MEN); /* Initiate STOP */
141 	readb(i2c->base + MPC_I2C_DR);
143 	writeccr(i2c, 0);
146 static int i2c_mpc_wait_sr(struct mpc_i2c *i2c, int mask)
148 	void __iomem *addr = i2c->base + MPC_I2C_SR;
174 static void mpc_i2c_fixup_A004447(struct mpc_i2c *i2c)
179 	writeccr(i2c, CCR_MEN | CCR_MSTA);
180 	ret = i2c_mpc_wait_sr(i2c, CSR_MBB);
182 		dev_err(i2c->dev, "timeout waiting for CSR_MBB\n");
186 	val = readb(i2c->base + MPC_I2C_SR);
189 		writeccr(i2c, 0x00);
190 		writeccr(i2c, CCR_MSTA | CCR_RSVD);
191 		writeccr(i2c, CCR_MEN | CCR_MSTA | CCR_RSVD);
192 		ret = i2c_mpc_wait_sr(i2c, CSR_MBB);
194 			dev_err(i2c->dev, "timeout waiting for CSR_MBB\n");
197 		val = readb(i2c->base + MPC_I2C_DR);
198 		ret = i2c_mpc_wait_sr(i2c, CSR_MIF);
200 			dev_err(i2c->dev, "timeout waiting for CSR_MIF\n");
203 		writeccr(i2c, CCR_MEN | CCR_RSVD);
205 		val = readb(i2c->base + MPC_I2C_DR);
206 		ret = i2c_mpc_wait_sr(i2c, CSR_MIF);
208 			dev_err(i2c->dev, "timeout waiting for CSR_MIF\n");
211 		writeccr(i2c, CCR_MEN);
273 					 struct mpc_i2c *i2c,
279 		dev_dbg(i2c->dev, "using fdr %d\n",
280 			readb(i2c->base + MPC_I2C_FDR));
284 	ret = mpc_i2c_get_fdr_52xx(node, clock, &i2c->real_clk);
287 	writeb(fdr & 0xff, i2c->base + MPC_I2C_FDR);
290 		dev_info(i2c->dev, "clock %u Hz (fdr=%d)\n", i2c->real_clk,
295 					 struct mpc_i2c *i2c,
303 					 struct mpc_i2c *i2c,
311 		of_find_compatible_node(NULL, NULL, "fsl,mpc5121-i2c-ctrl");
316 			/* Interrupt enable bits for i2c-0/1/2: bit 24/26/28 */
325 	mpc_i2c_setup_52xx(node, i2c, clock);
329 					 struct mpc_i2c *i2c,
456 					 struct mpc_i2c *i2c,
462 		dev_dbg(i2c->dev, "using dfsrr %d, fdr %d\n",
463 			readb(i2c->base + MPC_I2C_DFSRR),
464 			readb(i2c->base + MPC_I2C_FDR));
468 	ret = mpc_i2c_get_fdr_8xxx(node, clock, &i2c->real_clk);
471 	writeb(fdr & 0xff, i2c->base + MPC_I2C_FDR);
472 	writeb((fdr >> 8) & 0xff, i2c->base + MPC_I2C_DFSRR);
475 		dev_info(i2c->dev, "clock %d Hz (dfsrr=%d fdr=%d)\n",
476 			 i2c->real_clk, fdr >> 8, fdr & 0xff);
481 					 struct mpc_i2c *i2c,
487 static void mpc_i2c_finish(struct mpc_i2c *i2c, int rc)
489 	i2c->rc = rc;
490 	i2c->block = 0;
491 	i2c->cntl_bits = CCR_MEN;
492 	writeccr(i2c, i2c->cntl_bits);
493 	wake_up(&i2c->waitq);
496 static void mpc_i2c_do_action(struct mpc_i2c *i2c)
503 	dev_dbg(i2c->dev, "action = %s\n", action_str[i2c->action]);
505 	i2c->cntl_bits &= ~(CCR_RSTA | CCR_MTX | CCR_TXAK);
507 	if (i2c->action != MPC_I2C_ACTION_STOP) {
508 		msg = &i2c->msgs[i2c->curr_msg];
515 	switch (i2c->action) {
517 		i2c->cntl_bits |= CCR_RSTA;
521 		i2c->cntl_bits |= CCR_MSTA | CCR_MTX;
522 		writeccr(i2c, i2c->cntl_bits);
523 		writeb((msg->addr << 1) | dir, i2c->base + MPC_I2C_DR);
524 		i2c->expect_rxack = 1;
525 		i2c->action = dir ? MPC_I2C_ACTION_READ_BEGIN : MPC_I2C_ACTION_WRITE;
531 				i2c->cntl_bits |= CCR_TXAK;
533 			writeccr(i2c, i2c->cntl_bits);
535 			readb(i2c->base + MPC_I2C_DR);
537 		i2c->action = MPC_I2C_ACTION_READ_BYTE;
541 		if (i2c->byte_posn || !recv_len) {
543 			if (i2c->byte_posn == msg->len - 2)
544 				i2c->cntl_bits |= CCR_TXAK;
546 			if (i2c->byte_posn == msg->len - 1)
547 				i2c->cntl_bits |= CCR_MTX;
549 			writeccr(i2c, i2c->cntl_bits);
552 		byte = readb(i2c->base + MPC_I2C_DR);
554 		if (i2c->byte_posn == 0 && recv_len) {
556 				mpc_i2c_finish(i2c, -EPROTO);
565 				i2c->cntl_bits |= CCR_TXAK;
566 				writeccr(i2c, i2c->cntl_bits);
570 		dev_dbg(i2c->dev, "%s %02x\n", action_str[i2c->action], byte);
571 		msg->buf[i2c->byte_posn++] = byte;
575 		dev_dbg(i2c->dev, "%s %02x\n", action_str[i2c->action],
576 			msg->buf[i2c->byte_posn]);
577 		writeb(msg->buf[i2c->byte_posn++], i2c->base + MPC_I2C_DR);
578 		i2c->expect_rxack = 1;
582 		mpc_i2c_finish(i2c, 0);
586 		WARN(1, "Unexpected action %d\n", i2c->action);
590 	if (msg && msg->len == i2c->byte_posn) {
591 		i2c->curr_msg++;
592 		i2c->byte_posn = 0;
594 		if (i2c->curr_msg == i2c->num_msgs) {
595 			i2c->action = MPC_I2C_ACTION_STOP;
601 				mpc_i2c_finish(i2c, 0);
603 			i2c->action = MPC_I2C_ACTION_RESTART;
608 static void mpc_i2c_do_intr(struct mpc_i2c *i2c, u8 status)
610 	spin_lock(&i2c->lock);
613 		dev_dbg(i2c->dev, "unfinished\n");
614 		mpc_i2c_finish(i2c, -EIO);
619 		dev_dbg(i2c->dev, "arbitration lost\n");
620 		mpc_i2c_finish(i2c, -EAGAIN);
624 	if (i2c->expect_rxack && (status & CSR_RXAK)) {
625 		dev_dbg(i2c->dev, "no Rx ACK\n");
626 		mpc_i2c_finish(i2c, -ENXIO);
629 	i2c->expect_rxack = 0;
631 	mpc_i2c_do_action(i2c);
634 	spin_unlock(&i2c->lock);
639 	struct mpc_i2c *i2c = dev_id;
642 	status = readb(i2c->base + MPC_I2C_SR);
645 		readb_poll_timeout_atomic(i2c->base + MPC_I2C_SR, status, status & CSR_MCF, 0, 100);
646 		writeb(0, i2c->base + MPC_I2C_SR);
647 		mpc_i2c_do_intr(i2c, status);
653 static int mpc_i2c_wait_for_completion(struct mpc_i2c *i2c)
657 	time_left = wait_event_timeout(i2c->waitq, !i2c->block, i2c->adap.timeout);
666 static int mpc_i2c_execute_msg(struct mpc_i2c *i2c)
672 	spin_lock_irqsave(&i2c->lock, flags);
674 	i2c->curr_msg = 0;
675 	i2c->rc = 0;
676 	i2c->byte_posn = 0;
677 	i2c->block = 1;
678 	i2c->action = MPC_I2C_ACTION_START;
680 	i2c->cntl_bits = CCR_MEN | CCR_MIEN;
681 	writeb(0, i2c->base + MPC_I2C_SR);
682 	writeccr(i2c, i2c->cntl_bits);
684 	mpc_i2c_do_action(i2c);
686 	spin_unlock_irqrestore(&i2c->lock, flags);
688 	ret = mpc_i2c_wait_for_completion(i2c);
690 		i2c->rc = ret;
692 	if (i2c->rc == -EIO || i2c->rc == -EAGAIN || i2c->rc == -ETIMEDOUT)
693 		i2c_recover_bus(&i2c->adap);
697 	while (readb(i2c->base + MPC_I2C_SR) & CSR_MBB) {
699 			u8 status = readb(i2c->base + MPC_I2C_SR);
701 			dev_dbg(i2c->dev, "timeout\n");
704 				       i2c->base + MPC_I2C_SR);
705 				i2c_recover_bus(&i2c->adap);
712 	return i2c->rc;
718 	struct mpc_i2c *i2c = i2c_get_adapdata(adap);
721 	dev_dbg(i2c->dev, "num = %d\n", num);
723 		dev_dbg(i2c->dev, "  addr = %02x, flags = %02x, len = %d, %*ph\n",
728 	WARN_ON(i2c->msgs != NULL);
729 	i2c->msgs = msgs;
730 	i2c->num_msgs = num;
732 	rc = mpc_i2c_execute_msg(i2c);
736 	i2c->num_msgs = 0;
737 	i2c->msgs = NULL;
750 	struct mpc_i2c *i2c = i2c_get_adapdata(adap);
752 	if (i2c->has_errata_A004447)
753 		mpc_i2c_fixup_A004447(i2c);
755 		mpc_i2c_fixup(i2c);
777 	struct mpc_i2c *i2c;
782 	i2c = devm_kzalloc(&op->dev, sizeof(*i2c), GFP_KERNEL);
783 	if (!i2c)
786 	i2c->dev = &op->dev; /* for debug and error output */
788 	init_waitqueue_head(&i2c->waitq);
789 	spin_lock_init(&i2c->lock);
791 	i2c->base = devm_platform_ioremap_resource(op, 0);
792 	if (IS_ERR(i2c->base))
793 		return PTR_ERR(i2c->base);
795 	i2c->irq = platform_get_irq(op, 0);
796 	if (i2c->irq < 0)
797 		return i2c->irq;
799 	result = devm_request_irq(&op->dev, i2c->irq, mpc_i2c_isr,
800 			IRQF_SHARED, "i2c-mpc", i2c);
802 		dev_err(i2c->dev, "failed to attach interrupt\n");
827 		data->setup(op->dev.of_node, i2c, clock);
831 			mpc_i2c_setup_8xxx(op->dev.of_node, i2c, clock);
836 				      "i2c-transfer-timeout-us",
840 					      "i2c-scl-clk-low-timeout-us",
854 	dev_info(i2c->dev, "timeout %u us\n", mpc_ops.timeout * 1000000 / HZ);
856 	if (of_property_read_bool(op->dev.of_node, "fsl,i2c-erratum-a004447"))
857 		i2c->has_errata_A004447 = true;
859 	i2c->adap = mpc_ops;
860 	scnprintf(i2c->adap.name, sizeof(i2c->adap.name),
862 	i2c->adap.dev.parent = &op->dev;
863 	i2c->adap.nr = op->id;
864 	i2c->adap.dev.of_node = of_node_get(op->dev.of_node);
865 	i2c->adap.bus_recovery_info = &fsl_i2c_recovery_info;
866 	platform_set_drvdata(op, i2c);
867 	i2c_set_adapdata(&i2c->adap, i2c);
869 	result = i2c_add_numbered_adapter(&i2c->adap);
878 	struct mpc_i2c *i2c = platform_get_drvdata(op);
880 	i2c_del_adapter(&i2c->adap);
885 	struct mpc_i2c *i2c = dev_get_drvdata(dev);
887 	i2c->fdr = readb(i2c->base + MPC_I2C_FDR);
888 	i2c->dfsrr = readb(i2c->base + MPC_I2C_DFSRR);
895 	struct mpc_i2c *i2c = dev_get_drvdata(dev);
897 	writeb(i2c->fdr, i2c->base + MPC_I2C_FDR);
898 	writeb(i2c->dfsrr, i2c->base + MPC_I2C_DFSRR);
925 	{.compatible = "mpc5200-i2c", .data = &mpc_i2c_data_52xx, },
926 	{.compatible = "fsl,mpc5200b-i2c", .data = &mpc_i2c_data_52xx, },
927 	{.compatible = "fsl,mpc5200-i2c", .data = &mpc_i2c_data_52xx, },
928 	{.compatible = "fsl,mpc5121-i2c", .data = &mpc_i2c_data_512x, },
929 	{.compatible = "fsl,mpc8313-i2c", .data = &mpc_i2c_data_8313, },
930 	{.compatible = "fsl,mpc8543-i2c", .data = &mpc_i2c_data_8543, },
931 	{.compatible = "fsl,mpc8544-i2c", .data = &mpc_i2c_data_8544, },
933 	{.compatible = "fsl-i2c", },
943 		.name = "mpc-i2c",