Lines Matching refs:i2c
15 #include <linux/i2c.h>
171 static inline unsigned short jz4780_i2c_readw(struct jz4780_i2c *i2c,
174 return readw(i2c->iomem + offset);
177 static inline void jz4780_i2c_writew(struct jz4780_i2c *i2c,
180 writew(val, i2c->iomem + offset);
183 static int jz4780_i2c_disable(struct jz4780_i2c *i2c)
188 jz4780_i2c_writew(i2c, JZ4780_I2C_ENB, 0);
191 regval = jz4780_i2c_readw(i2c, JZ4780_I2C_ENSTA);
198 dev_err(&i2c->adap.dev, "disable failed: ENSTA=0x%04x\n", regval);
202 static int jz4780_i2c_enable(struct jz4780_i2c *i2c)
207 jz4780_i2c_writew(i2c, JZ4780_I2C_ENB, 1);
210 regval = jz4780_i2c_readw(i2c, JZ4780_I2C_ENSTA);
217 dev_err(&i2c->adap.dev, "enable failed: ENSTA=0x%04x\n", regval);
221 static int jz4780_i2c_set_target(struct jz4780_i2c *i2c, unsigned char address)
227 regval = jz4780_i2c_readw(i2c, JZ4780_I2C_STA);
236 jz4780_i2c_writew(i2c, JZ4780_I2C_TAR, address);
240 dev_err(&i2c->adap.dev,
247 static int jz4780_i2c_set_speed(struct jz4780_i2c *i2c)
249 int dev_clk_khz = clk_get_rate(i2c->clk) / 1000;
256 int i2c_clk = i2c->speed;
258 if (jz4780_i2c_disable(i2c))
259 dev_dbg(&i2c->adap.dev, "i2c not disabled\n");
276 * NOTE: JZ4780_I2C_CTRL_REST can't set when i2c enabled, because
277 * normal read are 2 messages, we cannot disable i2c controller
285 jz4780_i2c_writew(i2c, JZ4780_I2C_CTRL, tmp);
287 jz4780_i2c_writew(i2c, JZ4780_I2C_SHCNT,
289 jz4780_i2c_writew(i2c, JZ4780_I2C_SLCNT,
294 jz4780_i2c_writew(i2c, JZ4780_I2C_CTRL, tmp);
296 jz4780_i2c_writew(i2c, JZ4780_I2C_FHCNT,
298 jz4780_i2c_writew(i2c, JZ4780_I2C_FLCNT,
303 * a i2c device must internally provide a hold time at least 300ns
337 jz4780_i2c_writew(i2c, JZ4780_I2C_SDASU, setup_time);
343 /*i2c hold time enable */
344 if (i2c->cdata->version >= ID_X1000) {
345 jz4780_i2c_writew(i2c, X1000_I2C_SDAHD, hold_time);
348 jz4780_i2c_writew(i2c, JZ4780_I2C_SDAHD, hold_time);
352 if (i2c->cdata->version >= ID_X1000)
353 jz4780_i2c_writew(i2c, X1000_I2C_SDAHD, 0);
355 jz4780_i2c_writew(i2c, JZ4780_I2C_SDAHD, 0);
361 static int jz4780_i2c_cleanup(struct jz4780_i2c *i2c)
367 spin_lock_irqsave(&i2c->lock, flags);
370 if (i2c->cdata->version < ID_X1000) {
371 tmp = jz4780_i2c_readw(i2c, JZ4780_I2C_CTRL);
373 jz4780_i2c_writew(i2c, JZ4780_I2C_CTRL, tmp);
377 jz4780_i2c_writew(i2c, JZ4780_I2C_INTM, 0);
380 jz4780_i2c_readw(i2c, JZ4780_I2C_CTXABRT);
381 jz4780_i2c_readw(i2c, JZ4780_I2C_CINTR);
384 tmp = jz4780_i2c_readw(i2c, JZ4780_I2C_CTRL);
386 jz4780_i2c_writew(i2c, JZ4780_I2C_CTRL, tmp);
389 jz4780_i2c_writew(i2c, JZ4780_I2C_CTRL, tmp);
391 spin_unlock_irqrestore(&i2c->lock, flags);
393 ret = jz4780_i2c_disable(i2c);
395 dev_err(&i2c->adap.dev,
398 if (unlikely(jz4780_i2c_readw(i2c, JZ4780_I2C_INTM)
399 & jz4780_i2c_readw(i2c, JZ4780_I2C_INTST)))
400 dev_err(&i2c->adap.dev,
406 static int jz4780_i2c_prepare(struct jz4780_i2c *i2c)
408 jz4780_i2c_set_speed(i2c);
409 return jz4780_i2c_enable(i2c);
412 static void jz4780_i2c_send_rcmd(struct jz4780_i2c *i2c,
419 jz4780_i2c_writew(i2c, JZ4780_I2C_DC, JZ4780_I2C_DC_READ);
421 if ((cmd_left == 0) && (i2c->cdata->version >= ID_X1000))
422 jz4780_i2c_writew(i2c, JZ4780_I2C_DC,
425 jz4780_i2c_writew(i2c, JZ4780_I2C_DC, JZ4780_I2C_DC_READ);
428 static void jz4780_i2c_trans_done(struct jz4780_i2c *i2c)
430 jz4780_i2c_writew(i2c, JZ4780_I2C_INTM, 0);
431 complete(&i2c->trans_waitq);
439 struct jz4780_i2c *i2c = dev_id;
441 spin_lock(&i2c->lock);
442 intmsk = jz4780_i2c_readw(i2c, JZ4780_I2C_INTM);
443 intst = jz4780_i2c_readw(i2c, JZ4780_I2C_INTST);
448 jz4780_i2c_trans_done(i2c);
453 dev_dbg(&i2c->adap.dev, "received fifo overflow!\n");
454 jz4780_i2c_trans_done(i2c);
462 if (i2c->is_write == 0) {
465 while ((jz4780_i2c_readw(i2c, JZ4780_I2C_STA)
467 *(i2c->rbuf++) = jz4780_i2c_readw(i2c, JZ4780_I2C_DC)
469 i2c->rd_data_xfered++;
470 if (i2c->rd_data_xfered == i2c->rd_total_len) {
471 jz4780_i2c_trans_done(i2c);
476 rd_left = i2c->rd_total_len - i2c->rd_data_xfered;
478 if (rd_left <= i2c->cdata->fifosize)
479 jz4780_i2c_writew(i2c, JZ4780_I2C_RXTL, rd_left - 1);
483 if (i2c->is_write == 0) {
484 int cmd_left = i2c->rd_total_len - i2c->rd_cmd_xfered;
485 int max_send = (i2c->cdata->fifosize - 1)
486 - (i2c->rd_cmd_xfered
487 - i2c->rd_data_xfered);
490 if (i2c->rd_cmd_xfered != 0)
492 i2c->cdata->fifosize
493 - i2c->cdata->tx_level - 1);
496 i2c->rd_cmd_xfered += cmd_to_send;
497 cmd_left = i2c->rd_total_len -
498 i2c->rd_cmd_xfered;
499 jz4780_i2c_send_rcmd(i2c,
505 intmsk = jz4780_i2c_readw(i2c, JZ4780_I2C_INTM);
507 jz4780_i2c_writew(i2c, JZ4780_I2C_INTM, intmsk);
509 if (i2c->cdata->version < ID_X1000) {
510 tmp = jz4780_i2c_readw(i2c,
513 jz4780_i2c_writew(i2c,
521 i2c_sta = jz4780_i2c_readw(i2c, JZ4780_I2C_STA);
524 (i2c->wt_len > 0)) {
525 i2c_sta = jz4780_i2c_readw(i2c, JZ4780_I2C_STA);
526 data = *i2c->wbuf;
528 if ((i2c->wt_len == 1) && (!i2c->stop_hold) &&
529 (i2c->cdata->version >= ID_X1000))
531 jz4780_i2c_writew(i2c, JZ4780_I2C_DC, data);
532 i2c->wbuf++;
533 i2c->wt_len--;
536 if (i2c->wt_len == 0) {
537 if ((!i2c->stop_hold) && (i2c->cdata->version <
539 tmp = jz4780_i2c_readw(i2c,
542 jz4780_i2c_writew(i2c,
546 jz4780_i2c_trans_done(i2c);
553 spin_unlock(&i2c->lock);
557 static void jz4780_i2c_txabrt(struct jz4780_i2c *i2c, int src)
559 dev_dbg(&i2c->adap.dev, "txabrt: 0x%08x, cmd: %d, send: %d, recv: %d\n",
560 src, i2c->cmd, i2c->cmd_buf[i2c->cmd], i2c->data_buf[i2c->cmd]);
563 static inline int jz4780_i2c_xfer_read(struct jz4780_i2c *i2c,
575 spin_lock_irqsave(&i2c->lock, flags);
577 i2c->stop_hold = 0;
578 i2c->is_write = 0;
579 i2c->rbuf = buf;
580 i2c->rd_total_len = len;
581 i2c->rd_data_xfered = 0;
582 i2c->rd_cmd_xfered = 0;
584 if (len <= i2c->cdata->fifosize)
585 jz4780_i2c_writew(i2c, JZ4780_I2C_RXTL, len - 1);
587 jz4780_i2c_writew(i2c, JZ4780_I2C_RXTL, i2c->cdata->rx_level);
589 jz4780_i2c_writew(i2c, JZ4780_I2C_TXTL, i2c->cdata->tx_level);
591 jz4780_i2c_writew(i2c, JZ4780_I2C_INTM,
595 if (i2c->cdata->version < ID_X1000) {
596 tmp = jz4780_i2c_readw(i2c, JZ4780_I2C_CTRL);
598 jz4780_i2c_writew(i2c, JZ4780_I2C_CTRL, tmp);
601 spin_unlock_irqrestore(&i2c->lock, flags);
603 time_left = wait_for_completion_timeout(&i2c->trans_waitq,
607 dev_err(&i2c->adap.dev, "irq read timeout\n");
608 dev_dbg(&i2c->adap.dev, "send cmd count:%d %d\n",
609 i2c->cmd, i2c->cmd_buf[i2c->cmd]);
610 dev_dbg(&i2c->adap.dev, "receive data count:%d %d\n",
611 i2c->cmd, i2c->data_buf[i2c->cmd]);
615 tmp = jz4780_i2c_readw(i2c, JZ4780_I2C_TXABRT);
617 jz4780_i2c_txabrt(i2c, tmp);
624 static inline int jz4780_i2c_xfer_write(struct jz4780_i2c *i2c,
634 spin_lock_irqsave(&i2c->lock, flags);
637 i2c->stop_hold = 1;
639 i2c->stop_hold = 0;
641 i2c->is_write = 1;
642 i2c->wbuf = buf;
643 i2c->wt_len = len;
645 jz4780_i2c_writew(i2c, JZ4780_I2C_TXTL, i2c->cdata->tx_level);
647 jz4780_i2c_writew(i2c, JZ4780_I2C_INTM, JZ4780_I2C_INTM_MTXEMP
650 if (i2c->cdata->version < ID_X1000) {
651 tmp = jz4780_i2c_readw(i2c, JZ4780_I2C_CTRL);
653 jz4780_i2c_writew(i2c, JZ4780_I2C_CTRL, tmp);
656 spin_unlock_irqrestore(&i2c->lock, flags);
658 time_left = wait_for_completion_timeout(&i2c->trans_waitq,
660 if (time_left && !i2c->stop_hold) {
666 i2c_sta = jz4780_i2c_readw(i2c, JZ4780_I2C_STA);
677 dev_err(&i2c->adap.dev, "write wait timeout\n");
681 tmp = jz4780_i2c_readw(i2c, JZ4780_I2C_TXABRT);
683 jz4780_i2c_txabrt(i2c, tmp);
695 struct jz4780_i2c *i2c = adap->algo_data;
697 ret = jz4780_i2c_prepare(i2c);
699 dev_err(&i2c->adap.dev, "I2C prepare failed\n");
703 if (msg->addr != jz4780_i2c_readw(i2c, JZ4780_I2C_TAR)) {
704 ret = jz4780_i2c_set_target(i2c, msg->addr);
710 ret = jz4780_i2c_xfer_read(i2c, msg->buf, msg->len,
713 ret = jz4780_i2c_xfer_write(i2c, msg->buf, msg->len,
723 jz4780_i2c_cleanup(i2c);
754 { .compatible = "ingenic,jz4770-i2c", .data = &jz4780_i2c_config },
755 { .compatible = "ingenic,jz4780-i2c", .data = &jz4780_i2c_config },
756 { .compatible = "ingenic,x1000-i2c", .data = &x1000_i2c_config },
766 struct jz4780_i2c *i2c;
768 i2c = devm_kzalloc(&pdev->dev, sizeof(struct jz4780_i2c), GFP_KERNEL);
769 if (!i2c)
772 i2c->cdata = device_get_match_data(&pdev->dev);
773 if (!i2c->cdata) {
778 i2c->adap.owner = THIS_MODULE;
779 i2c->adap.algo = &jz4780_i2c_algorithm;
780 i2c->adap.algo_data = i2c;
781 i2c->adap.retries = 5;
782 i2c->adap.dev.parent = &pdev->dev;
783 i2c->adap.dev.of_node = pdev->dev.of_node;
784 sprintf(i2c->adap.name, "%s", pdev->name);
786 init_completion(&i2c->trans_waitq);
787 spin_lock_init(&i2c->lock);
789 i2c->iomem = devm_platform_ioremap_resource(pdev, 0);
790 if (IS_ERR(i2c->iomem))
791 return PTR_ERR(i2c->iomem);
793 platform_set_drvdata(pdev, i2c);
795 i2c->clk = devm_clk_get_enabled(&pdev->dev, NULL);
796 if (IS_ERR(i2c->clk))
797 return PTR_ERR(i2c->clk);
806 i2c->speed = clk_freq / 1000;
807 if (i2c->speed == 0) {
812 jz4780_i2c_set_speed(i2c);
814 dev_info(&pdev->dev, "Bus frequency is %d KHz\n", i2c->speed);
816 if (i2c->cdata->version < ID_X1000) {
817 tmp = jz4780_i2c_readw(i2c, JZ4780_I2C_CTRL);
819 jz4780_i2c_writew(i2c, JZ4780_I2C_CTRL, tmp);
822 jz4780_i2c_writew(i2c, JZ4780_I2C_INTM, 0x0);
827 i2c->irq = ret;
829 ret = devm_request_irq(&pdev->dev, i2c->irq, jz4780_i2c_irq, 0,
830 dev_name(&pdev->dev), i2c);
834 ret = i2c_add_adapter(&i2c->adap);
843 struct jz4780_i2c *i2c = platform_get_drvdata(pdev);
845 i2c_del_adapter(&i2c->adap);
852 .name = "jz4780-i2c",
861 MODULE_DESCRIPTION("i2c driver for JZ4780 SoCs");