i2c/busses/i2c-at91-master.c

33 void at91_init_twi_bus_master(struct at91_twi_dev *dev)
35 	struct at91_twi_pdata *pdata = dev->pdata;
39 	if (dev->fifo_size)
40 		at91_twi_write(dev, AT91_TWI_CR, AT91_TWI_FIFOEN);
41 	at91_twi_write(dev, AT91_TWI_CR, AT91_TWI_MSEN);
42 	at91_twi_write(dev, AT91_TWI_CR, AT91_TWI_SVDIS);
43 	at91_twi_write(dev, AT91_TWI_CWGR, dev->twi_cwgr_reg);
46 	if (pdata->has_dig_filtr && dev->enable_dig_filt)
50 	if (pdata->has_adv_dig_filtr && dev->enable_dig_filt)
52 			 (AT91_TWI_FILTR_THRES(dev->filter_width) &
56 	if (pdata->has_ana_filtr && dev->enable_ana_filt)
60 		at91_twi_write(dev, AT91_TWI_FILTR, filtr);
67 static void at91_calc_twi_clock(struct at91_twi_dev *dev)
70 	struct at91_twi_pdata *pdata = dev->pdata;
75 	i2c_parse_fw_timings(dev->dev, t, true);
77 	div = max(0, (int)DIV_ROUND_UP(clk_get_rate(dev->clk),
83 		dev_warn(dev->dev, "%d exceeds ckdiv max value which is %d.\n",
96 				    * (clk_get_rate(dev->clk) / 1000), 1000000);
101 			dev_warn(dev->dev,
114 				* (clk_get_rate(dev->clk) / 1000), 1000000);
116 			dev_warn(dev->dev,
123 	dev->twi_cwgr_reg = (ckdiv << 16) | (cdiv << 8) | cdiv
126 	dev->filter_width = filter_width;
128 	dev_dbg(dev->dev, "cdiv %d ckdiv %d hold %d (%d ns), filter_width %d (%d ns)\n",
133 static void at91_twi_dma_cleanup(struct at91_twi_dev *dev)
135 	struct at91_twi_dma *dma = &dev->dma;
137 	at91_twi_irq_save(dev);
147 		dma_unmap_single(dev->dev, sg_dma_address(&dma->sg[0]),
148 				 dev->buf_len, dma->direction);
152 	at91_twi_irq_restore(dev);
155 static void at91_twi_write_next_byte(struct at91_twi_dev *dev)
157 	if (!dev->buf_len)
161 	writeb_relaxed(*dev->buf, dev->base + AT91_TWI_THR);
164 	if (--dev->buf_len == 0) {
165 		if (!dev->use_alt_cmd)
166 			at91_twi_write(dev, AT91_TWI_CR, AT91_TWI_STOP);
167 		at91_twi_write(dev, AT91_TWI_IDR, AT91_TWI_TXRDY);
170 	dev_dbg(dev->dev, "wrote 0x%x, to go %zu\n", *dev->buf, dev->buf_len);
172 	++dev->buf;
177 	struct at91_twi_dev *dev = (struct at91_twi_dev *)data;
179 	dma_unmap_single(dev->dev, sg_dma_address(&dev->dma.sg[0]),
180 			 dev->buf_len, DMA_TO_DEVICE);
189 	at91_twi_write(dev, AT91_TWI_IER, AT91_TWI_TXCOMP);
190 	if (!dev->use_alt_cmd)
191 		at91_twi_write(dev, AT91_TWI_CR, AT91_TWI_STOP);
194 static void at91_twi_write_data_dma(struct at91_twi_dev *dev)
198 	struct at91_twi_dma *dma = &dev->dma;
202 	if (!dev->buf_len)
207 	at91_twi_irq_save(dev);
208 	dma_addr = dma_map_single(dev->dev, dev->buf, dev->buf_len,
210 	if (dma_mapping_error(dev->dev, dma_addr)) {
211 		dev_err(dev->dev, "dma map failed\n");
215 	at91_twi_irq_restore(dev);
217 	if (dev->fifo_size) {
224 		part1_len = dev->buf_len & ~0x3;
231 		part2_len = dev->buf_len & 0x3;
242 		fifo_mr = at91_twi_read(dev, AT91_TWI_FMR);
245 		at91_twi_write(dev, AT91_TWI_FMR, fifo_mr);
247 		sg_dma_len(&dma->sg[0]) = dev->buf_len;
255 		dev_err(dev->dev, "dma prep slave sg failed\n");
260 	txdesc->callback_param = dev;
269 	at91_twi_dma_cleanup(dev);
272 static void at91_twi_read_next_byte(struct at91_twi_dev *dev)
278 	if (!dev->buf_len) {
279 		at91_twi_read(dev, AT91_TWI_RHR);
284 	*dev->buf = readb_relaxed(dev->base + AT91_TWI_RHR);
285 	--dev->buf_len;
288 	if (dev->recv_len_abort)
292 	if (unlikely(dev->msg->flags & I2C_M_RECV_LEN)) {
294 		if (*dev->buf <= I2C_SMBUS_BLOCK_MAX && *dev->buf > 0) {
295 			dev->msg->flags &= ~I2C_M_RECV_LEN;
296 			dev->buf_len += *dev->buf;
297 			dev->msg->len = dev->buf_len + 1;
298 			dev_dbg(dev->dev, "received block length %zu\n",
299 					 dev->buf_len);
302 			dev->recv_len_abort = true;
303 			dev->buf_len = 1;
308 	if (!dev->use_alt_cmd && dev->buf_len == 1)
309 		at91_twi_write(dev, AT91_TWI_CR, AT91_TWI_STOP);
311 	dev_dbg(dev->dev, "read 0x%x, to go %zu\n", *dev->buf, dev->buf_len);
313 	++dev->buf;
318 	struct at91_twi_dev *dev = (struct at91_twi_dev *)data;
321 	dma_unmap_single(dev->dev, sg_dma_address(&dev->dma.sg[0]),
322 			 dev->buf_len, DMA_FROM_DEVICE);
324 	if (!dev->use_alt_cmd) {
326 		dev->buf += dev->buf_len - 2;
327 		dev->buf_len = 2;
330 	at91_twi_write(dev, AT91_TWI_IER, ier);
333 static void at91_twi_read_data_dma(struct at91_twi_dev *dev)
337 	struct at91_twi_dma *dma = &dev->dma;
341 	buf_len = (dev->use_alt_cmd) ? dev->buf_len : dev->buf_len - 2;
345 	at91_twi_irq_save(dev);
346 	dma_addr = dma_map_single(dev->dev, dev->buf, buf_len, DMA_FROM_DEVICE);
347 	if (dma_mapping_error(dev->dev, dma_addr)) {
348 		dev_err(dev->dev, "dma map failed\n");
352 	at91_twi_irq_restore(dev);
354 	if (dev->fifo_size && IS_ALIGNED(buf_len, 4)) {
361 		fifo_mr = at91_twi_read(dev, AT91_TWI_FMR);
364 		at91_twi_write(dev, AT91_TWI_FMR, fifo_mr);
373 		dev_err(dev->dev, "dma prep slave sg failed\n");
378 	rxdesc->callback_param = dev;
387 	at91_twi_dma_cleanup(dev);
392 	struct at91_twi_dev *dev = dev_id;
393 	const unsigned status = at91_twi_read(dev, AT91_TWI_SR);
394 	const unsigned irqstatus = status & at91_twi_read(dev, AT91_TWI_IMR);
421 			at91_twi_read_next_byte(dev);
422 		} while (at91_twi_read(dev, AT91_TWI_SR) & AT91_TWI_RXRDY);
464 		at91_disable_twi_interrupts(dev);
465 		complete(&dev->cmd_complete);
467 		at91_twi_write_next_byte(dev);
471 	dev->transfer_status |= status;
476 static int at91_do_twi_transfer(struct at91_twi_dev *dev)
480 	bool has_unre_flag = dev->pdata->has_unre_flag;
481 	bool has_alt_cmd = dev->pdata->has_alt_cmd;
526 	dev_dbg(dev->dev, "transfer: %s %zu bytes.\n",
527 		str_read_write(dev->msg->flags & I2C_M_RD), dev->buf_len);
529 	reinit_completion(&dev->cmd_complete);
530 	dev->transfer_status = 0;
533 	at91_twi_read(dev, AT91_TWI_SR);
535 	if (dev->fifo_size) {
536 		unsigned fifo_mr = at91_twi_read(dev, AT91_TWI_FMR);
543 		at91_twi_write(dev, AT91_TWI_FMR, fifo_mr);
546 		at91_twi_write(dev, AT91_TWI_CR,
550 	if (!dev->buf_len) {
551 		at91_twi_write(dev, AT91_TWI_CR, AT91_TWI_QUICK);
552 		at91_twi_write(dev, AT91_TWI_IER, AT91_TWI_TXCOMP);
553 	} else if (dev->msg->flags & I2C_M_RD) {
557 		if (!dev->use_alt_cmd && dev->buf_len <= 1 &&
558 		    !(dev->msg->flags & I2C_M_RECV_LEN))
560 		at91_twi_write(dev, AT91_TWI_CR, start_flags);
570 		if (dev->use_dma && (dev->buf_len > AT91_I2C_DMA_THRESHOLD)) {
571 			at91_twi_write(dev, AT91_TWI_IER, AT91_TWI_NACK);
572 			at91_twi_read_data_dma(dev);
574 			at91_twi_write(dev, AT91_TWI_IER,
580 		if (dev->use_dma && (dev->buf_len > AT91_I2C_DMA_THRESHOLD)) {
581 			at91_twi_write(dev, AT91_TWI_IER, AT91_TWI_NACK);
582 			at91_twi_write_data_dma(dev);
584 			at91_twi_write_next_byte(dev);
585 			at91_twi_write(dev, AT91_TWI_IER,
587 				       (dev->buf_len ? AT91_TWI_TXRDY : 0));
591 	time_left = wait_for_completion_timeout(&dev->cmd_complete,
592 					      dev->adapter.timeout);
594 		dev->transfer_status |= at91_twi_read(dev, AT91_TWI_SR);
595 		at91_init_twi_bus(dev);
599 	if (dev->transfer_status & AT91_TWI_NACK) {
600 		dev_dbg(dev->dev, "received nack\n");
604 	if (dev->transfer_status & AT91_TWI_OVRE) {
605 		dev_err(dev->dev, "overrun while reading\n");
609 	if (has_unre_flag && dev->transfer_status & AT91_TWI_UNRE) {
610 		dev_err(dev->dev, "underrun while writing\n");
614 	if ((has_alt_cmd || dev->fifo_size) &&
615 	    (dev->transfer_status & AT91_TWI_LOCK)) {
616 		dev_err(dev->dev, "tx locked\n");
620 	if (dev->recv_len_abort) {
621 		dev_err(dev->dev, "invalid smbus block length recvd\n");
626 	dev_dbg(dev->dev, "transfer complete\n");
632 	at91_twi_dma_cleanup(dev);
634 	if ((has_alt_cmd || dev->fifo_size) &&
635 	    (dev->transfer_status & AT91_TWI_LOCK)) {
636 		dev_dbg(dev->dev, "unlock tx\n");
637 		at91_twi_write(dev, AT91_TWI_CR,
646 	i2c_recover_bus(&dev->adapter);
653 	struct at91_twi_dev *dev = i2c_get_adapdata(adap);
660 	dev_dbg(&adap->dev, "at91_xfer: processing %d messages:\n", num);
662 	ret = pm_runtime_get_sync(dev->dev);
678 		at91_twi_write(dev, AT91_TWI_IADR, internal_address);
681 	dev->use_alt_cmd = false;
683 	if (dev->pdata->has_alt_cmd) {
686 			at91_twi_write(dev, AT91_TWI_CR, AT91_TWI_ACMEN);
687 			at91_twi_write(dev, AT91_TWI_ACR,
690 			dev->use_alt_cmd = true;
692 			at91_twi_write(dev, AT91_TWI_CR, AT91_TWI_ACMDIS);
696 	at91_twi_write(dev, AT91_TWI_MMR,
699 		       ((!dev->use_alt_cmd && is_read) ? AT91_TWI_MREAD : 0));
701 	dev->buf_len = m_start->len;
702 	dev->buf = m_start->buf;
703 	dev->msg = m_start;
704 	dev->recv_len_abort = false;
706 	if (dev->use_dma) {
712 		dev->buf = dma_buf;
715 	ret = at91_do_twi_transfer(dev);
720 	pm_runtime_mark_last_busy(dev->dev);
721 	pm_runtime_put_autosuspend(dev->dev);
746 static int at91_twi_configure_dma(struct at91_twi_dev *dev, u32 phy_addr)
750 	struct at91_twi_dma *dma = &dev->dma;
768 	if (dev->fifo_size)
780 	dma->chan_tx = dma_request_chan(dev->dev, "tx");
787 	dma->chan_rx = dma_request_chan(dev->dev, "rx");
796 		dev_err(dev->dev, "failed to configure tx channel\n");
803 		dev_err(dev->dev, "failed to configure rx channel\n");
811 	dev->use_dma = true;
813 	dev_info(dev->dev, "using %s (tx) and %s (rx) for DMA transfers\n",
820 		dev_info(dev->dev, "can't get DMA channel, continue without DMA support\n");
829 				       struct at91_twi_dev *dev)
831 	struct i2c_bus_recovery_info *rinfo = &dev->rinfo;
833 	rinfo->pinctrl = devm_pinctrl_get(&pdev->dev);
835 		dev_info(dev->dev, "pinctrl unavailable, bus recovery not supported\n");
839 		dev_info(dev->dev, "can't get pinctrl, bus recovery not supported\n");
842 	dev->adapter.bus_recovery_info = rinfo;
849 	struct at91_twi_dev *dev = i2c_get_adapdata(adap);
851 	dev->transfer_status |= at91_twi_read(dev, AT91_TWI_SR);
852 	if (!(dev->transfer_status & AT91_TWI_SDA)) {
853 		dev_dbg(dev->dev, "SDA is down; sending bus clear command\n");
854 		if (dev->use_alt_cmd) {
857 			acr = at91_twi_read(dev, AT91_TWI_ACR);
859 			at91_twi_write(dev, AT91_TWI_ACR, acr);
861 		at91_twi_write(dev, AT91_TWI_CR, AT91_TWI_CLEAR);
868 				       struct at91_twi_dev *dev)
870 	struct i2c_bus_recovery_info *rinfo = &dev->rinfo;
871 	bool has_clear_cmd = dev->pdata->has_clear_cmd;
874 		return at91_init_twi_recovery_gpio(pdev, dev);
877 	dev->adapter.bus_recovery_info = rinfo;
883 			  u32 phy_addr, struct at91_twi_dev *dev)
887 	init_completion(&dev->cmd_complete);
889 	rc = devm_request_irq(&pdev->dev, dev->irq, atmel_twi_interrupt, 0,
890 			      dev_name(dev->dev), dev);
892 		dev_err(dev->dev, "Cannot get irq %d: %d\n", dev->irq, rc);
896 	if (dev->dev->of_node) {
897 		rc = at91_twi_configure_dma(dev, phy_addr);
902 	if (!of_property_read_u32(pdev->dev.of_node, "atmel,fifo-size",
903 				  &dev->fifo_size)) {
904 		dev_info(dev->dev, "Using FIFO (%u data)\n", dev->fifo_size);
907 	dev->enable_dig_filt = of_property_read_bool(pdev->dev.of_node,
910 	dev->enable_ana_filt = of_property_read_bool(pdev->dev.of_node,
912 	at91_calc_twi_clock(dev);
914 	rc = at91_init_twi_recovery_info(pdev, dev);
918 	dev->adapter.algo = &at91_twi_algorithm;
919 	dev->adapter.quirks = &at91_twi_quirks;