hwtracing/coresight/coresight-cti.h

1 /* SPDX-License-Identifier: GPL-2.0 */
10 #include <linux/coresight.h>
17 #include "coresight-priv.h"
23  * 0x000 - 0x144: CTI programming and status
24  * 0xEDC - 0xEF8: CTI integration test.
25  * 0xF00 - 0xFFC: Coresight management registers.
27 /* CTI programming registers */
42 #define ITCHINACK		0xEDC /* WO CTI CSSoc 400 only*/
43 #define ITTRIGINACK		0xEE0 /* WO CTI CSSoc 400 only*/
44 #define ITCHOUT			0xEE4 /* WO RW-600 */
45 #define ITTRIGOUT		0xEE8 /* WO RW-600 */
46 #define ITCHOUTACK		0xEEC /* RO CTI CSSoc 400 only*/
47 #define ITTRIGOUTACK		0xEF0 /* RO CTI CSSoc 400 only*/
55  * CTI CSSoc 600 has a max of 32 trigger signals per direction.
56  * CTI CSSoc 400 has 8 IO triggers - other CTIs can be impl def.
58  * - pick up actual number used from .dts parameters if present.
76  * Trigger connection - connection between a CTI and other (coresight) device
81  * @con_dev: coresight device connected to the CTI, NULL if not CS device
98  * struct cti_device - description of CTI device properties.
104  * @cpu: CPU ID if associated with CPU, -1 otherwise.
117  * struct cti_config - configuration of the CTI device hardware
120  *		 (max of trig_in or trig_out) - from ID register.
121  * @nr_ctm_channels: number of available CTM channels - from ID register.
122  * @enable_req_count: CTI is enabled alongside >=1 associated devices.
129  *		     a core CTI.
132  * @ctiappset: CTI Software application channel set.
136  * @ctigate: gate channel output from CTI to CTM.
144 	/* cti enable control */
156 	/* cti cross trig programmable regs */
166  * struct cti_drvdata - specifics for the CTI device
168  * @csdev:	Standard CoreSight device information.
169  * @ctidev:	Extra information needed by the CTI/CTM framework.
171  * @config:	Configuration data for this CTI device.
172  * @node:	List entry of this device in the list of CTI devices.
209 /* private cti driver fns & vars */
236 /* cti powered and enabled */
239 	return cfg->hw_powered && cfg->hw_enabled;  in cti_active()