drm/vmwgfx/vmwgfx_kms.c

31 	struct vmw_private *dev_priv = vmw_priv(du->primary.dev);
35 	if (vmw_cmd_supported(dev_priv))
446  * @dev_priv: Pointer to the device private structure.
458 int vmw_kms_readback(struct vmw_private *dev_priv,
465 	switch (dev_priv->active_display_unit) {
467 		return vmw_kms_sou_readback(dev_priv, file_priv, vfb,
471 		return vmw_kms_stdu_readback(dev_priv, file_priv, vfb,
500 static int vmw_kms_new_framebuffer_surface(struct vmw_private *dev_priv,
508 	struct drm_device *dev = &dev_priv->drm;
514 	if (dev_priv->active_display_unit == vmw_du_legacy)
523 	if (!drm_any_plane_has_format(&dev_priv->drm,
526 		drm_dbg(&dev_priv->drm,
603 static int vmw_kms_new_framebuffer_bo(struct vmw_private *dev_priv,
611 	struct drm_device *dev = &dev_priv->drm;
623 	if (!drm_any_plane_has_format(&dev_priv->drm,
626 		drm_dbg(&dev_priv->drm,
662  * @dev_priv: Pointer to device private struct.
669 vmw_kms_srf_ok(struct vmw_private *dev_priv, uint32_t width, uint32_t height)
671 	if (width  > dev_priv->texture_max_width ||
672 	    height > dev_priv->texture_max_height)
681  * @dev_priv: Pointer to device private struct.
688 vmw_kms_new_framebuffer(struct vmw_private *dev_priv,
698 		ret = vmw_kms_new_framebuffer_surface(dev_priv, uo, &vfb,
701 		ret = vmw_kms_new_framebuffer_bo(dev_priv, uo->buffer, &vfb,
722 	struct vmw_private *dev_priv = vmw_priv(dev);
730 	ret = vmw_user_object_lookup(dev_priv, file_priv, mode_cmd->handles[0],
740 	    !vmw_kms_srf_ok(dev_priv, mode_cmd->width, mode_cmd->height)) {
742 			dev_priv->texture_max_width,
743 			dev_priv->texture_max_height);
749 	vfb = vmw_kms_new_framebuffer(dev_priv, &uo, info, mode_cmd);
792 	struct vmw_private *dev_priv = vmw_priv(dev);
802 		if (dev_priv->active_display_unit == vmw_du_screen_target &&
803 		    (drm_rect_width(&rects[i]) > dev_priv->stdu_max_width ||
804 		     drm_rect_height(&rects[i]) > dev_priv->stdu_max_height)) {
828 	if (pixel_mem > dev_priv->max_primary_mem) {
834 	if (dev_priv->active_display_unit != vmw_du_screen_target ||
835 	    !(dev_priv->capabilities & SVGA_CAP_NO_BB_RESTRICTION)) {
838 		if (bb_mem > dev_priv->max_primary_mem) {
1067 static int vmw_kms_generic_present(struct vmw_private *dev_priv,
1076 	return vmw_kms_sou_do_surface_dirty(dev_priv, vfb, NULL, clips,
1082 int vmw_kms_present(struct vmw_private *dev_priv,
1093 	switch (dev_priv->active_display_unit) {
1095 		ret = vmw_kms_stdu_surface_dirty(dev_priv, vfb, NULL, clips,
1100 		ret = vmw_kms_generic_present(dev_priv, file_priv, vfb, surface,
1113 	vmw_cmd_flush(dev_priv, false);
1119 vmw_kms_create_hotplug_mode_update_property(struct vmw_private *dev_priv)
1121 	if (dev_priv->hotplug_mode_update_property)
1124 	dev_priv->hotplug_mode_update_property =
1125 		drm_property_create_range(&dev_priv->drm,
1153 int vmw_kms_init(struct vmw_private *dev_priv)
1155 	struct drm_device *dev = &dev_priv->drm;
1169 	dev->mode_config.max_width = dev_priv->texture_max_width;
1170 	dev->mode_config.max_height = dev_priv->texture_max_height;
1171 	dev->mode_config.preferred_depth = dev_priv->assume_16bpp ? 16 : 32;
1175 	vmw_kms_create_hotplug_mode_update_property(dev_priv);
1177 	ret = vmw_kms_stdu_init_display(dev_priv);
1179 		ret = vmw_kms_sou_init_display(dev_priv);
1181 			ret = vmw_kms_ldu_init_display(dev_priv);
1184 	drm_info(&dev_priv->drm, "%s display unit initialized\n",
1185 		 display_unit_names[dev_priv->active_display_unit]);
1190 int vmw_kms_close(struct vmw_private *dev_priv)
1199 	drm_mode_config_cleanup(&dev_priv->drm);
1200 	if (dev_priv->active_display_unit == vmw_du_legacy)
1201 		ret = vmw_kms_ldu_close_display(dev_priv);
1229 bool vmw_kms_validate_mode_vram(struct vmw_private *dev_priv,
1233 	return (pitch * height) < (u64)dev_priv->vram_size;
1239  * @dev_priv: device private
1243 static int vmw_du_update_layout(struct vmw_private *dev_priv,
1246 	struct drm_device *dev = &dev_priv->drm;
1322 	struct vmw_private *dev_priv = vmw_priv(crtc->dev);
1328 		vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 0, r[i] >> 8);
1329 		vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 1, g[i] >> 8);
1330 		vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 2, b[i] >> 8);
1346 	struct vmw_private *dev_priv = vmw_priv(dev);
1349 	num_displays = vmw_read(dev_priv, SVGA_REG_NUM_DISPLAYS);
1399 	struct vmw_private *dev_priv = vmw_priv(dev);
1413 		vmw_du_update_layout(dev_priv, 1, &def_rect);
1477 		vmw_du_update_layout(dev_priv, arg->num_outputs, drm_rects);
1488  * @dev_priv: Pointer to a device private structure.
1501 int vmw_kms_helper_dirty(struct vmw_private *dev_priv,
1515 	dirty->dev_priv = dev_priv;
1521 		list_for_each_entry(crtc, &dev_priv->drm.mode_config.crtc_list,
1541 			dirty->cmd = VMW_CMD_RESERVE(dev_priv,
1610  * @dev_priv: Pointer to the device-private struct
1617 void vmw_kms_helper_validation_finish(struct vmw_private *dev_priv,
1630 		ret = vmw_execbuf_fence_commands(file_priv, dev_priv, &fence,
1634 		vmw_execbuf_copy_fence_user(dev_priv, vmw_fpriv(file_priv),
1647  * @dev_priv: Pointer to a device private struct.
1652 vmw_kms_create_implicit_placement_property(struct vmw_private *dev_priv)
1654 	if (dev_priv->implicit_placement_property)
1657 	dev_priv->implicit_placement_property =
1658 		drm_property_create_range(&dev_priv->drm,
1671 	struct vmw_private *dev_priv = vmw_priv(dev);
1673 	dev_priv->suspend_state = drm_atomic_helper_suspend(dev);
1674 	if (IS_ERR(dev_priv->suspend_state)) {
1675 		int ret = PTR_ERR(dev_priv->suspend_state);
1678 		dev_priv->suspend_state = NULL;
1698 	struct vmw_private *dev_priv = vmw_priv(dev);
1701 	if (WARN_ON(!dev_priv->suspend_state))
1704 	ret = drm_atomic_helper_resume(dev, dev_priv->suspend_state);
1705 	dev_priv->suspend_state = NULL;
1765 		if (update->dev_priv->active_display_unit == vmw_du_screen_target) {
1770 			WARN_ON(update->dev_priv->has_mob);
1792 	cmd_start = VMW_CMD_RESERVE(update->dev_priv, reserved_size);
1841 	vmw_cmd_commit(update->dev_priv, submit_size);
1843 	vmw_kms_helper_validation_finish(update->dev_priv, NULL, &val_ctx,
1868 	struct vmw_private *dev_priv = vmw_priv(dev);
1871 	if (dev_priv->assume_16bpp)
1874 	ret = drm_mode_validate_size(mode, dev_priv->texture_max_width,
1875 				     dev_priv->texture_max_height);
1879 	if (!vmw_kms_validate_mode_vram(dev_priv,
1898 	struct vmw_private *dev_priv = vmw_priv(dev);
1923 	max_width  = dev_priv->texture_max_width;
1924 	max_height = dev_priv->texture_max_height;
1926 	if (dev_priv->active_display_unit == vmw_du_screen_target) {
1927 		max_width  = min(dev_priv->stdu_max_width,  max_width);
1928 		max_height = min(dev_priv->stdu_max_height, max_height);