Lines Matching defs:surf
101 struct drm_vc4_submit_rcl_surface *surf,
104 return bo->dma_addr + surf->offset + VC4_TILE_BUFFER_SIZE *
385 struct drm_vc4_submit_rcl_surface *surf)
390 if (surf->offset > obj->base.size) {
392 surf->offset, obj->base.size);
396 if ((obj->base.size - surf->offset) / VC4_TILE_BUFFER_SIZE <
402 surf->offset);
411 struct drm_vc4_submit_rcl_surface *surf)
413 if (surf->flags != 0 || surf->bits != 0) {
418 if (surf->hindex == ~0)
421 *obj = vc4_use_bo(exec, surf->hindex);
427 if (surf->offset & 0xf) {
432 return vc4_full_res_bounds_check(exec, *obj, surf);
437 struct drm_vc4_submit_rcl_surface *surf,
440 uint8_t tiling = VC4_GET_FIELD(surf->bits,
442 uint8_t buffer = VC4_GET_FIELD(surf->bits,
444 uint8_t format = VC4_GET_FIELD(surf->bits,
449 if (surf->flags & ~VC4_SUBMIT_RCL_SURFACE_READ_IS_FULL_RES) {
454 if (surf->hindex == ~0)
457 *obj = vc4_use_bo(exec, surf->hindex);
464 if (surf->flags & VC4_SUBMIT_RCL_SURFACE_READ_IS_FULL_RES) {
465 if (surf == &exec->args->zs_write) {
470 if (surf->bits != 0) {
476 ret = vc4_full_res_bounds_check(exec, *obj, surf);
483 if (surf->bits & ~(VC4_LOADSTORE_TILE_BUFFER_TILING_MASK |
487 surf->bits);
520 if (surf->offset & 0xf) {
525 if (!vc4_check_tex_size(exec, *obj, surf->offset, tiling,
537 struct drm_vc4_submit_rcl_surface *surf)
539 uint8_t tiling = VC4_GET_FIELD(surf->bits,
541 uint8_t format = VC4_GET_FIELD(surf->bits,
545 if (surf->flags != 0) {
550 if (surf->bits & ~(VC4_RENDER_CONFIG_MEMORY_FORMAT_MASK |
555 surf->bits);
559 if (surf->hindex == ~0)
562 *obj = vc4_use_bo(exec, surf->hindex);
586 if (!vc4_check_tex_size(exec, *obj, surf->offset, tiling,