Lines Matching refs:clock_settings
408 const struct phy_lane_settings *chan0_settings, *chan1_settings, *chan2_settings, *clock_settings;
505 clock_settings =
522 VC4_SET_FIELD(clock_settings->amplitude.preemphasis,
524 VC4_SET_FIELD(clock_settings->amplitude.main_driver,
535 VC4_SET_FIELD(clock_settings->res_sel_data,
545 VC4_SET_FIELD(clock_settings->term_res_sel_data,
958 const struct vc6_phy_lane_settings *clock_settings;
1128 clock_settings =
1132 VC4_SET_FIELD(clock_settings->ext_current_ctl,
1134 VC4_SET_FIELD(clock_settings->ffe_enable,
1136 VC4_SET_FIELD(clock_settings->slew_rate_ctl,
1138 VC4_SET_FIELD(clock_settings->ffe_post_tap_en,
1140 VC4_SET_FIELD(clock_settings->ldmos_bias_ctl,
1142 VC4_SET_FIELD(clock_settings->com_mode_ldmos_en,
1144 VC4_SET_FIELD(clock_settings->edge_sel,
1146 VC4_SET_FIELD(clock_settings->ext_current_src_hs_en,
1148 VC4_SET_FIELD(clock_settings->term_ctl,
1150 VC4_SET_FIELD(clock_settings->ext_current_src_en,
1152 VC4_SET_FIELD(clock_settings->int_current_src_en,
1154 VC4_SET_FIELD(clock_settings->int_current_ctl,
1156 VC4_SET_FIELD(clock_settings->int_current_src_hs_en,
1158 VC4_SET_FIELD(clock_settings->main_tap_current_select,
1160 VC4_SET_FIELD(clock_settings->post_tap_current_select,
1162 VC4_SET_FIELD(clock_settings->slew_ctl_slow_loading,
1164 VC4_SET_FIELD(clock_settings->slew_ctl_slow_driving,
1166 VC4_SET_FIELD(clock_settings->ffe_pre_tap_en,