drm/tidss/tidss_dispc.c

112 			.hw_id = 0,
194 			.hw_id = 0,
199 			.hw_id = 1,
295 			.hw_id = 0,
300 			.hw_id = 1,
305 			.hw_id = 2,
310 			.hw_id = 3,
366 			.hw_id = 0,
371 			.hw_id = 1,
431 			.hw_id = 0,
436 			.hw_id = 1,
472 			.hw_id = 1,
860 	u32 hw_id = dispc->feat->vid_info[hw_plane].hw_id;
861 	u32 stat = dispc_read(dispc, DISPC_VID_IRQSTATUS(hw_id));
869 	u32 hw_id = dispc->feat->vid_info[hw_plane].hw_id;
872 	dispc_write(dispc, DISPC_VID_IRQSTATUS(hw_id), stat);
894 	u32 hw_id = dispc->feat->vid_info[hw_plane].hw_id;
895 	u32 stat = dispc_read(dispc, DISPC_VID_IRQENABLE(hw_id));
903 	u32 hw_id = dispc->feat->vid_info[hw_plane].hw_id;
906 	dispc_write(dispc, DISPC_VID_IRQENABLE(hw_id), stat);
983 		u32 hw_id = dispc->feat->vid_info[i].hw_id;
988 			main_enable |= BIT(hw_id + 4);	/* VID IRQ */
990 			main_disable |= BIT(hw_id + 4);	/* VID IRQ */
1491 	u32 hw_id = dispc->feat->vid_info[hw_plane].hw_id;
1494 			hw_id, 4, 1);
1505 	u32 hw_id = dispc->feat->vid_info[hw_plane].hw_id;
1508 			hw_id, 4, 1);