Lines Matching full:x
210 #define S_0000F0_SOFT_RESET_CP(x) (((x) & 0x1) << 0)
211 #define G_0000F0_SOFT_RESET_CP(x) (((x) >> 0) & 0x1)
213 #define S_0000F0_SOFT_RESET_HI(x) (((x) & 0x1) << 1)
214 #define G_0000F0_SOFT_RESET_HI(x) (((x) >> 1) & 0x1)
216 #define S_0000F0_SOFT_RESET_VAP(x) (((x) & 0x1) << 2)
217 #define G_0000F0_SOFT_RESET_VAP(x) (((x) >> 2) & 0x1)
219 #define S_0000F0_SOFT_RESET_RE(x) (((x) & 0x1) << 3)
220 #define G_0000F0_SOFT_RESET_RE(x) (((x) >> 3) & 0x1)
222 #define S_0000F0_SOFT_RESET_PP(x) (((x) & 0x1) << 4)
223 #define G_0000F0_SOFT_RESET_PP(x) (((x) >> 4) & 0x1)
225 #define S_0000F0_SOFT_RESET_E2(x) (((x) & 0x1) << 5)
226 #define G_0000F0_SOFT_RESET_E2(x) (((x) >> 5) & 0x1)
228 #define S_0000F0_SOFT_RESET_RB(x) (((x) & 0x1) << 6)
229 #define G_0000F0_SOFT_RESET_RB(x) (((x) >> 6) & 0x1)
231 #define S_0000F0_SOFT_RESET_HDP(x) (((x) & 0x1) << 7)
232 #define G_0000F0_SOFT_RESET_HDP(x) (((x) >> 7) & 0x1)
234 #define S_0000F0_SOFT_RESET_MC(x) (((x) & 0x1) << 8)
235 #define G_0000F0_SOFT_RESET_MC(x) (((x) >> 8) & 0x1)
237 #define S_0000F0_SOFT_RESET_AIC(x) (((x) & 0x1) << 9)
238 #define G_0000F0_SOFT_RESET_AIC(x) (((x) >> 9) & 0x1)
240 #define S_0000F0_SOFT_RESET_VIP(x) (((x) & 0x1) << 10)
241 #define G_0000F0_SOFT_RESET_VIP(x) (((x) >> 10) & 0x1)
243 #define S_0000F0_SOFT_RESET_DISP(x) (((x) & 0x1) << 11)
244 #define G_0000F0_SOFT_RESET_DISP(x) (((x) >> 11) & 0x1)
246 #define S_0000F0_SOFT_RESET_CG(x) (((x) & 0x1) << 12)
247 #define G_0000F0_SOFT_RESET_CG(x) (((x) >> 12) & 0x1)
249 #define S_0000F0_SOFT_RESET_GA(x) (((x) & 0x1) << 13)
250 #define G_0000F0_SOFT_RESET_GA(x) (((x) >> 13) & 0x1)
252 #define S_0000F0_SOFT_RESET_IDCT(x) (((x) & 0x1) << 14)
253 #define G_0000F0_SOFT_RESET_IDCT(x) (((x) >> 14) & 0x1)
256 #define S_0000F8_CONFIG_MEMSIZE(x) (((x) & 0xFFFFFFFF) << 0)
257 #define G_0000F8_CONFIG_MEMSIZE(x) (((x) >> 0) & 0xFFFFFFFF)
260 #define S_000134_HDP_FB_START(x) (((x) & 0xFFFF) << 0)
261 #define G_000134_HDP_FB_START(x) (((x) >> 0) & 0xFFFF)
264 #define S_000300_VGA_BLINK_RATE(x) (((x) & 0x1F) << 0)
265 #define G_000300_VGA_BLINK_RATE(x) (((x) >> 0) & 0x1F)
267 #define S_000300_VGA_BLINK_MODE(x) (((x) & 0x3) << 5)
268 #define G_000300_VGA_BLINK_MODE(x) (((x) >> 5) & 0x3)
270 #define S_000300_VGA_CURSOR_BLINK_INVERT(x) (((x) & 0x1) << 7)
271 #define G_000300_VGA_CURSOR_BLINK_INVERT(x) (((x) >> 7) & 0x1)
273 #define S_000300_VGA_EXTD_ADDR_COUNT_ENABLE(x) (((x) & 0x1) << 8)
274 #define G_000300_VGA_EXTD_ADDR_COUNT_ENABLE(x) (((x) >> 8) & 0x1)
276 #define S_000300_VGA_VSTATUS_CNTL(x) (((x) & 0x3) << 16)
277 #define G_000300_VGA_VSTATUS_CNTL(x) (((x) >> 16) & 0x3)
279 #define S_000300_VGA_LOCK_8DOT(x) (((x) & 0x1) << 24)
280 #define G_000300_VGA_LOCK_8DOT(x) (((x) >> 24) & 0x1)
282 #define S_000300_VGAREG_LINECMP_COMPATIBILITY_SEL(x) (((x) & 0x1) << 25)
283 #define G_000300_VGAREG_LINECMP_COMPATIBILITY_SEL(x) (((x) >> 25) & 0x1)
286 #define S_000310_VGA_MEMORY_BASE_ADDRESS(x) (((x) & 0xFFFFFFFF) << 0)
287 #define G_000310_VGA_MEMORY_BASE_ADDRESS(x) (((x) >> 0) & 0xFFFFFFFF)
290 #define S_000328_VGA_MEM_PAGE_SELECT_EN(x) (((x) & 0x1) << 0)
291 #define G_000328_VGA_MEM_PAGE_SELECT_EN(x) (((x) >> 0) & 0x1)
293 #define S_000328_VGA_RBBM_LOCK_DISABLE(x) (((x) & 0x1) << 8)
294 #define G_000328_VGA_RBBM_LOCK_DISABLE(x) (((x) >> 8) & 0x1)
296 #define S_000328_VGA_SOFT_RESET(x) (((x) & 0x1) << 16)
297 #define G_000328_VGA_SOFT_RESET(x) (((x) >> 16) & 0x1)
299 #define S_000328_VGA_TEST_RESET_CONTROL(x) (((x) & 0x1) << 24)
300 #define G_000328_VGA_TEST_RESET_CONTROL(x) (((x) >> 24) & 0x1)
303 #define S_000330_D1VGA_MODE_ENABLE(x) (((x) & 0x1) << 0)
304 #define G_000330_D1VGA_MODE_ENABLE(x) (((x) >> 0) & 0x1)
306 #define S_000330_D1VGA_TIMING_SELECT(x) (((x) & 0x1) << 8)
307 #define G_000330_D1VGA_TIMING_SELECT(x) (((x) >> 8) & 0x1)
309 #define S_000330_D1VGA_SYNC_POLARITY_SELECT(x) (((x) & 0x1) << 9)
310 #define G_000330_D1VGA_SYNC_POLARITY_SELECT(x) (((x) >> 9) & 0x1)
312 #define S_000330_D1VGA_OVERSCAN_TIMING_SELECT(x) (((x) & 0x1) << 10)
313 #define G_000330_D1VGA_OVERSCAN_TIMING_SELECT(x) (((x) >> 10) & 0x1)
315 #define S_000330_D1VGA_OVERSCAN_COLOR_EN(x) (((x) & 0x1) << 16)
316 #define G_000330_D1VGA_OVERSCAN_COLOR_EN(x) (((x) >> 16) & 0x1)
318 #define S_000330_D1VGA_ROTATE(x) (((x) & 0x3) << 24)
319 #define G_000330_D1VGA_ROTATE(x) (((x) >> 24) & 0x3)
322 #define S_000338_D2VGA_MODE_ENABLE(x) (((x) & 0x1) << 0)
323 #define G_000338_D2VGA_MODE_ENABLE(x) (((x) >> 0) & 0x1)
325 #define S_000338_D2VGA_TIMING_SELECT(x) (((x) & 0x1) << 8)
326 #define G_000338_D2VGA_TIMING_SELECT(x) (((x) >> 8) & 0x1)
328 #define S_000338_D2VGA_SYNC_POLARITY_SELECT(x) (((x) & 0x1) << 9)
329 #define G_000338_D2VGA_SYNC_POLARITY_SELECT(x) (((x) >> 9) & 0x1)
331 #define S_000338_D2VGA_OVERSCAN_TIMING_SELECT(x) (((x) & 0x1) << 10)
332 #define G_000338_D2VGA_OVERSCAN_TIMING_SELECT(x) (((x) >> 10) & 0x1)
334 #define S_000338_D2VGA_OVERSCAN_COLOR_EN(x) (((x) & 0x1) << 16)
335 #define G_000338_D2VGA_OVERSCAN_COLOR_EN(x) (((x) >> 16) & 0x1)
337 #define S_000338_D2VGA_ROTATE(x) (((x) & 0x3) << 24)
338 #define G_000338_D2VGA_ROTATE(x) (((x) >> 24) & 0x3)
341 #define S_0007C0_MRU_BUSY(x) (((x) & 0x1) << 0)
342 #define G_0007C0_MRU_BUSY(x) (((x) >> 0) & 0x1)
344 #define S_0007C0_MWU_BUSY(x) (((x) & 0x1) << 1)
345 #define G_0007C0_MWU_BUSY(x) (((x) >> 1) & 0x1)
347 #define S_0007C0_RSIU_BUSY(x) (((x) & 0x1) << 2)
348 #define G_0007C0_RSIU_BUSY(x) (((x) >> 2) & 0x1)
350 #define S_0007C0_RCIU_BUSY(x) (((x) & 0x1) << 3)
351 #define G_0007C0_RCIU_BUSY(x) (((x) >> 3) & 0x1)
353 #define S_0007C0_CSF_PRIMARY_BUSY(x) (((x) & 0x1) << 9)
354 #define G_0007C0_CSF_PRIMARY_BUSY(x) (((x) >> 9) & 0x1)
356 #define S_0007C0_CSF_INDIRECT_BUSY(x) (((x) & 0x1) << 10)
357 #define G_0007C0_CSF_INDIRECT_BUSY(x) (((x) >> 10) & 0x1)
359 #define S_0007C0_CSQ_PRIMARY_BUSY(x) (((x) & 0x1) << 11)
360 #define G_0007C0_CSQ_PRIMARY_BUSY(x) (((x) >> 11) & 0x1)
362 #define S_0007C0_CSQ_INDIRECT_BUSY(x) (((x) & 0x1) << 12)
363 #define G_0007C0_CSQ_INDIRECT_BUSY(x) (((x) >> 12) & 0x1)
365 #define S_0007C0_CSI_BUSY(x) (((x) & 0x1) << 13)
366 #define G_0007C0_CSI_BUSY(x) (((x) >> 13) & 0x1)
368 #define S_0007C0_CSF_INDIRECT2_BUSY(x) (((x) & 0x1) << 14)
369 #define G_0007C0_CSF_INDIRECT2_BUSY(x) (((x) >> 14) & 0x1)
371 #define S_0007C0_CSQ_INDIRECT2_BUSY(x) (((x) & 0x1) << 15)
372 #define G_0007C0_CSQ_INDIRECT2_BUSY(x) (((x) >> 15) & 0x1)
374 #define S_0007C0_GUIDMA_BUSY(x) (((x) & 0x1) << 28)
375 #define G_0007C0_GUIDMA_BUSY(x) (((x) >> 28) & 0x1)
377 #define S_0007C0_VIDDMA_BUSY(x) (((x) & 0x1) << 29)
378 #define G_0007C0_VIDDMA_BUSY(x) (((x) >> 29) & 0x1)
380 #define S_0007C0_CMDSTRM_BUSY(x) (((x) & 0x1) << 30)
381 #define G_0007C0_CMDSTRM_BUSY(x) (((x) >> 30) & 0x1)
383 #define S_0007C0_CP_BUSY(x) (((x) & 0x1) << 31)
384 #define G_0007C0_CP_BUSY(x) (((x) >> 31) & 0x1)
387 #define S_000E40_CMDFIFO_AVAIL(x) (((x) & 0x7F) << 0)
388 #define G_000E40_CMDFIFO_AVAIL(x) (((x) >> 0) & 0x7F)
390 #define S_000E40_HIRQ_ON_RBB(x) (((x) & 0x1) << 8)
391 #define G_000E40_HIRQ_ON_RBB(x) (((x) >> 8) & 0x1)
393 #define S_000E40_CPRQ_ON_RBB(x) (((x) & 0x1) << 9)
394 #define G_000E40_CPRQ_ON_RBB(x) (((x) >> 9) & 0x1)
396 #define S_000E40_CFRQ_ON_RBB(x) (((x) & 0x1) << 10)
397 #define G_000E40_CFRQ_ON_RBB(x) (((x) >> 10) & 0x1)
399 #define S_000E40_HIRQ_IN_RTBUF(x) (((x) & 0x1) << 11)
400 #define G_000E40_HIRQ_IN_RTBUF(x) (((x) >> 11) & 0x1)
402 #define S_000E40_CPRQ_IN_RTBUF(x) (((x) & 0x1) << 12)
403 #define G_000E40_CPRQ_IN_RTBUF(x) (((x) >> 12) & 0x1)
405 #define S_000E40_CFRQ_IN_RTBUF(x) (((x) & 0x1) << 13)
406 #define G_000E40_CFRQ_IN_RTBUF(x) (((x) >> 13) & 0x1)
408 #define S_000E40_CF_PIPE_BUSY(x) (((x) & 0x1) << 14)
409 #define G_000E40_CF_PIPE_BUSY(x) (((x) >> 14) & 0x1)
411 #define S_000E40_ENG_EV_BUSY(x) (((x) & 0x1) << 15)
412 #define G_000E40_ENG_EV_BUSY(x) (((x) >> 15) & 0x1)
414 #define S_000E40_CP_CMDSTRM_BUSY(x) (((x) & 0x1) << 16)
415 #define G_000E40_CP_CMDSTRM_BUSY(x) (((x) >> 16) & 0x1)
417 #define S_000E40_E2_BUSY(x) (((x) & 0x1) << 17)
418 #define G_000E40_E2_BUSY(x) (((x) >> 17) & 0x1)
420 #define S_000E40_RB2D_BUSY(x) (((x) & 0x1) << 18)
421 #define G_000E40_RB2D_BUSY(x) (((x) >> 18) & 0x1)
423 #define S_000E40_RB3D_BUSY(x) (((x) & 0x1) << 19)
424 #define G_000E40_RB3D_BUSY(x) (((x) >> 19) & 0x1)
426 #define S_000E40_VAP_BUSY(x) (((x) & 0x1) << 20)
427 #define G_000E40_VAP_BUSY(x) (((x) >> 20) & 0x1)
429 #define S_000E40_RE_BUSY(x) (((x) & 0x1) << 21)
430 #define G_000E40_RE_BUSY(x) (((x) >> 21) & 0x1)
432 #define S_000E40_TAM_BUSY(x) (((x) & 0x1) << 22)
433 #define G_000E40_TAM_BUSY(x) (((x) >> 22) & 0x1)
435 #define S_000E40_TDM_BUSY(x) (((x) & 0x1) << 23)
436 #define G_000E40_TDM_BUSY(x) (((x) >> 23) & 0x1)
438 #define S_000E40_PB_BUSY(x) (((x) & 0x1) << 24)
439 #define G_000E40_PB_BUSY(x) (((x) >> 24) & 0x1)
441 #define S_000E40_TIM_BUSY(x) (((x) & 0x1) << 25)
442 #define G_000E40_TIM_BUSY(x) (((x) >> 25) & 0x1)
444 #define S_000E40_GA_BUSY(x) (((x) & 0x1) << 26)
445 #define G_000E40_GA_BUSY(x) (((x) >> 26) & 0x1)
447 #define S_000E40_CBA2D_BUSY(x) (((x) & 0x1) << 27)
448 #define G_000E40_CBA2D_BUSY(x) (((x) >> 27) & 0x1)
450 #define S_000E40_RBBM_HIBUSY(x) (((x) & 0x1) << 28)
451 #define G_000E40_RBBM_HIBUSY(x) (((x) >> 28) & 0x1)
453 #define S_000E40_SKID_CFBUSY(x) (((x) & 0x1) << 29)
454 #define G_000E40_SKID_CFBUSY(x) (((x) >> 29) & 0x1)
456 #define S_000E40_VAP_VF_BUSY(x) (((x) & 0x1) << 30)
457 #define G_000E40_VAP_VF_BUSY(x) (((x) >> 30) & 0x1)
459 #define S_000E40_GUI_ACTIVE(x) (((x) & 0x1) << 31)
460 #define G_000E40_GUI_ACTIVE(x) (((x) >> 31) & 0x1)
463 #define S_006080_D1CRTC_MASTER_EN(x) (((x) & 0x1) << 0)
464 #define G_006080_D1CRTC_MASTER_EN(x) (((x) >> 0) & 0x1)
466 #define S_006080_D1CRTC_SYNC_RESET_SEL(x) (((x) & 0x1) << 4)
467 #define G_006080_D1CRTC_SYNC_RESET_SEL(x) (((x) >> 4) & 0x1)
469 #define S_006080_D1CRTC_DISABLE_POINT_CNTL(x) (((x) & 0x3) << 8)
470 #define G_006080_D1CRTC_DISABLE_POINT_CNTL(x) (((x) >> 8) & 0x3)
472 #define S_006080_D1CRTC_CURRENT_MASTER_EN_STATE(x) (((x) & 0x1) << 16)
473 #define G_006080_D1CRTC_CURRENT_MASTER_EN_STATE(x) (((x) >> 16) & 0x1)
475 #define S_006080_D1CRTC_DISP_READ_REQUEST_DISABLE(x) (((x) & 0x1) << 24)
476 #define G_006080_D1CRTC_DISP_READ_REQUEST_DISABLE(x) (((x) >> 24) & 0x1)
479 #define S_0060E8_D1CRTC_UPDATE_LOCK(x) (((x) & 0x1) << 0)
480 #define G_0060E8_D1CRTC_UPDATE_LOCK(x) (((x) >> 0) & 0x1)
483 #define S_006110_D1GRPH_PRIMARY_SURFACE_ADDRESS(x) (((x) & 0xFFFFFFFF) << 0)
484 #define G_006110_D1GRPH_PRIMARY_SURFACE_ADDRESS(x) (((x) >> 0) & 0xFFFFFFFF)
487 #define S_006118_D1GRPH_SECONDARY_SURFACE_ADDRESS(x) (((x) & 0xFFFFFFFF) << 0)
488 #define G_006118_D1GRPH_SECONDARY_SURFACE_ADDRESS(x) (((x) >> 0) & 0xFFFFFFFF)
491 #define S_006880_D2CRTC_MASTER_EN(x) (((x) & 0x1) << 0)
492 #define G_006880_D2CRTC_MASTER_EN(x) (((x) >> 0) & 0x1)
494 #define S_006880_D2CRTC_SYNC_RESET_SEL(x) (((x) & 0x1) << 4)
495 #define G_006880_D2CRTC_SYNC_RESET_SEL(x) (((x) >> 4) & 0x1)
497 #define S_006880_D2CRTC_DISABLE_POINT_CNTL(x) (((x) & 0x3) << 8)
498 #define G_006880_D2CRTC_DISABLE_POINT_CNTL(x) (((x) >> 8) & 0x3)
500 #define S_006880_D2CRTC_CURRENT_MASTER_EN_STATE(x) (((x) & 0x1) << 16)
501 #define G_006880_D2CRTC_CURRENT_MASTER_EN_STATE(x) (((x) >> 16) & 0x1)
503 #define S_006880_D2CRTC_DISP_READ_REQUEST_DISABLE(x) (((x) & 0x1) << 24)
504 #define G_006880_D2CRTC_DISP_READ_REQUEST_DISABLE(x) (((x) >> 24) & 0x1)
507 #define S_0068E8_D2CRTC_UPDATE_LOCK(x) (((x) & 0x1) << 0)
508 #define G_0068E8_D2CRTC_UPDATE_LOCK(x) (((x) >> 0) & 0x1)
511 #define S_006910_D2GRPH_PRIMARY_SURFACE_ADDRESS(x) (((x) & 0xFFFFFFFF) << 0)
512 #define G_006910_D2GRPH_PRIMARY_SURFACE_ADDRESS(x) (((x) >> 0) & 0xFFFFFFFF)
515 #define S_006918_D2GRPH_SECONDARY_SURFACE_ADDRESS(x) (((x) & 0xFFFFFFFF) << 0)
516 #define G_006918_D2GRPH_SECONDARY_SURFACE_ADDRESS(x) (((x) >> 0) & 0xFFFFFFFF)
521 #define S_000001_MC_FB_START(x) (((x) & 0xFFFF) << 0)
522 #define G_000001_MC_FB_START(x) (((x) >> 0) & 0xFFFF)
524 #define S_000001_MC_FB_TOP(x) (((x) & 0xFFFF) << 16)
525 #define G_000001_MC_FB_TOP(x) (((x) >> 16) & 0xFFFF)
528 #define S_000002_MC_AGP_START(x) (((x) & 0xFFFF) << 0)
529 #define G_000002_MC_AGP_START(x) (((x) >> 0) & 0xFFFF)
531 #define S_000002_MC_AGP_TOP(x) (((x) & 0xFFFF) << 16)
532 #define G_000002_MC_AGP_TOP(x) (((x) >> 16) & 0xFFFF)
535 #define S_000003_AGP_BASE_ADDR(x) (((x) & 0xFFFFFFFF) << 0)
536 #define G_000003_AGP_BASE_ADDR(x) (((x) >> 0) & 0xFFFFFFFF)
539 #define S_000004_AGP_BASE_ADDR_2(x) (((x) & 0xF) << 0)
540 #define G_000004_AGP_BASE_ADDR_2(x) (((x) >> 0) & 0xF)
545 #define S_00000F_CP_FORCEON(x) (((x) & 0x1) << 0)
546 #define G_00000F_CP_FORCEON(x) (((x) >> 0) & 0x1)
548 #define S_00000F_CP_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 1)
549 #define G_00000F_CP_MAX_DYN_STOP_LAT(x) (((x) >> 1) & 0x1)
551 #define S_00000F_CP_CLOCK_STATUS(x) (((x) & 0x1) << 2)
552 #define G_00000F_CP_CLOCK_STATUS(x) (((x) >> 2) & 0x1)
554 #define S_00000F_CP_PROG_SHUTOFF(x) (((x) & 0x1) << 3)
555 #define G_00000F_CP_PROG_SHUTOFF(x) (((x) >> 3) & 0x1)
557 #define S_00000F_CP_PROG_DELAY_VALUE(x) (((x) & 0xFF) << 4)
558 #define G_00000F_CP_PROG_DELAY_VALUE(x) (((x) >> 4) & 0xFF)
560 #define S_00000F_CP_LOWER_POWER_IDLE(x) (((x) & 0xFF) << 12)
561 #define G_00000F_CP_LOWER_POWER_IDLE(x) (((x) >> 12) & 0xFF)
563 #define S_00000F_CP_LOWER_POWER_IGNORE(x) (((x) & 0x1) << 20)
564 #define G_00000F_CP_LOWER_POWER_IGNORE(x) (((x) >> 20) & 0x1)
566 #define S_00000F_CP_NORMAL_POWER_IGNORE(x) (((x) & 0x1) << 21)
567 #define G_00000F_CP_NORMAL_POWER_IGNORE(x) (((x) >> 21) & 0x1)
569 #define S_00000F_SPARE(x) (((x) & 0x3) << 22)
570 #define G_00000F_SPARE(x) (((x) >> 22) & 0x3)
572 #define S_00000F_CP_NORMAL_POWER_BUSY(x) (((x) & 0xFF) << 24)
573 #define G_00000F_CP_NORMAL_POWER_BUSY(x) (((x) >> 24) & 0xFF)
576 #define S_000011_E2_FORCEON(x) (((x) & 0x1) << 0)
577 #define G_000011_E2_FORCEON(x) (((x) >> 0) & 0x1)
579 #define S_000011_E2_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 1)
580 #define G_000011_E2_MAX_DYN_STOP_LAT(x) (((x) >> 1) & 0x1)
582 #define S_000011_E2_CLOCK_STATUS(x) (((x) & 0x1) << 2)
583 #define G_000011_E2_CLOCK_STATUS(x) (((x) >> 2) & 0x1)
585 #define S_000011_E2_PROG_SHUTOFF(x) (((x) & 0x1) << 3)
586 #define G_000011_E2_PROG_SHUTOFF(x) (((x) >> 3) & 0x1)
588 #define S_000011_E2_PROG_DELAY_VALUE(x) (((x) & 0xFF) << 4)
589 #define G_000011_E2_PROG_DELAY_VALUE(x) (((x) >> 4) & 0xFF)
591 #define S_000011_E2_LOWER_POWER_IDLE(x) (((x) & 0xFF) << 12)
592 #define G_000011_E2_LOWER_POWER_IDLE(x) (((x) >> 12) & 0xFF)
594 #define S_000011_E2_LOWER_POWER_IGNORE(x) (((x) & 0x1) << 20)
595 #define G_000011_E2_LOWER_POWER_IGNORE(x) (((x) >> 20) & 0x1)
597 #define S_000011_E2_NORMAL_POWER_IGNORE(x) (((x) & 0x1) << 21)
598 #define G_000011_E2_NORMAL_POWER_IGNORE(x) (((x) >> 21) & 0x1)
600 #define S_000011_SPARE(x) (((x) & 0x3) << 22)
601 #define G_000011_SPARE(x) (((x) >> 22) & 0x3)
603 #define S_000011_E2_NORMAL_POWER_BUSY(x) (((x) & 0xFF) << 24)
604 #define G_000011_E2_NORMAL_POWER_BUSY(x) (((x) >> 24) & 0xFF)
607 #define S_000013_IDCT_FORCEON(x) (((x) & 0x1) << 0)
608 #define G_000013_IDCT_FORCEON(x) (((x) >> 0) & 0x1)
610 #define S_000013_IDCT_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 1)
611 #define G_000013_IDCT_MAX_DYN_STOP_LAT(x) (((x) >> 1) & 0x1)
613 #define S_000013_IDCT_CLOCK_STATUS(x) (((x) & 0x1) << 2)
614 #define G_000013_IDCT_CLOCK_STATUS(x) (((x) >> 2) & 0x1)
616 #define S_000013_IDCT_PROG_SHUTOFF(x) (((x) & 0x1) << 3)
617 #define G_000013_IDCT_PROG_SHUTOFF(x) (((x) >> 3) & 0x1)
619 #define S_000013_IDCT_PROG_DELAY_VALUE(x) (((x) & 0xFF) << 4)
620 #define G_000013_IDCT_PROG_DELAY_VALUE(x) (((x) >> 4) & 0xFF)
622 #define S_000013_IDCT_LOWER_POWER_IDLE(x) (((x) & 0xFF) << 12)
623 #define G_000013_IDCT_LOWER_POWER_IDLE(x) (((x) >> 12) & 0xFF)
625 #define S_000013_IDCT_LOWER_POWER_IGNORE(x) (((x) & 0x1) << 20)
626 #define G_000013_IDCT_LOWER_POWER_IGNORE(x) (((x) >> 20) & 0x1)
628 #define S_000013_IDCT_NORMAL_POWER_IGNORE(x) (((x) & 0x1) << 21)
629 #define G_000013_IDCT_NORMAL_POWER_IGNORE(x) (((x) >> 21) & 0x1)
631 #define S_000013_SPARE(x) (((x) & 0x3) << 22)
632 #define G_000013_SPARE(x) (((x) >> 22) & 0x3)
634 #define S_000013_IDCT_NORMAL_POWER_BUSY(x) (((x) & 0xFF) << 24)
635 #define G_000013_IDCT_NORMAL_POWER_BUSY(x) (((x) >> 24) & 0xFF)