drm/radeon/radeon_legacy_encoders.c

97 		WREG32(RADEON_DISP_PWR_MAN, disp_pwr_man);
100 		WREG32(RADEON_LVDS_PLL_CNTL, lvds_pll_cntl);
105 		WREG32(RADEON_LVDS_PLL_CNTL, lvds_pll_cntl);
115 		WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl);
125 			WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl);
128 			WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl);
132 		WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl);
243 	WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl);
244 	WREG32(RADEON_LVDS_PLL_CNTL, lvds_pll_cntl);
245 	WREG32(RADEON_LVDS_SS_GEN_CNTL, lvds_ss_gen_cntl);
248 		WREG32(RADEON_CLOCK_CNTL_INDEX, 0);
543 		WREG32(RADEON_CRTC_EXT_CNTL, crtc_ext_cntl);
544 	WREG32(RADEON_DAC_CNTL, dac_cntl);
545 	WREG32(RADEON_DAC_MACRO_CNTL, dac_macro_cntl);
593 			WREG32(RADEON_DISP_OUTPUT_CNTL, disp_output_cntl);
596 			WREG32(RADEON_DAC_CNTL2, dac2_cntl);
603 			WREG32(RADEON_DISP_OUTPUT_CNTL, disp_output_cntl);
606 			WREG32(RADEON_DAC_CNTL2, dac2_cntl);
626 	WREG32(RADEON_DAC_MACRO_CNTL, dac_macro_cntl);
664 	WREG32(RADEON_CRTC_EXT_CNTL, tmp);
681 	WREG32(RADEON_DAC_EXT_CNTL, tmp);
685 	WREG32(RADEON_DAC_CNTL, tmp);
692 	WREG32(RADEON_DAC_MACRO_CNTL, tmp);
700 	WREG32(RADEON_DAC_CNTL, dac_cntl);
701 	WREG32(RADEON_DAC_MACRO_CNTL, dac_macro_cntl);
702 	WREG32(RADEON_DAC_EXT_CNTL, dac_ext_cntl);
703 	WREG32(RADEON_CRTC_EXT_CNTL, crtc_ext_cntl);
742 	WREG32(RADEON_FP_GEN_CNTL, fp_gen_cntl);
864 	WREG32(RADEON_TMDS_PLL_CNTL, tmds_pll_cntl);
865 	WREG32(RADEON_TMDS_TRANSMITTER_CNTL, tmds_transmitter_cntl);
866 	WREG32(RADEON_FP_GEN_CNTL, fp_gen_cntl);
908 	WREG32(RADEON_FP2_GEN_CNTL, fp2_gen_cntl);
1000 	WREG32(RADEON_FP2_GEN_CNTL, fp2_gen_cntl);
1105 		WREG32(RADEON_FP2_GEN_CNTL, fp2_gen_cntl);
1108 			WREG32(RADEON_TV_MASTER_CNTL, tv_master_cntl);
1111 			WREG32(RADEON_CRTC2_GEN_CNTL, crtc2_gen_cntl);
1112 		WREG32(RADEON_TV_DAC_CNTL, tv_dac_cntl);
1203 		WREG32(RADEON_TV_DAC_CNTL, tv_dac_cntl);
1222 		WREG32(RADEON_DAC_CNTL, dac_cntl);
1250 		WREG32(RADEON_DAC_CNTL2, dac2_cntl);
1275 		WREG32(RADEON_DAC_CNTL2, dac2_cntl);
1280 		WREG32(RADEON_DISP_OUTPUT_CNTL, disp_output_cntl);
1282 		WREG32(RADEON_DISP_HW_DEBUG, disp_hw_debug);
1284 		WREG32(RADEON_FP2_GEN_CNTL, fp2_gen_cntl);
1287 		WREG32(RADEON_DISP_TV_OUT_CNTL, disp_tv_out_cntl);
1318 	WREG32(RADEON_DAC_CNTL2, RADEON_DAC2_DAC2_CLK_SEL);
1320 	WREG32(RADEON_CRTC2_GEN_CNTL,
1325 	WREG32(RADEON_DISP_OUTPUT_CNTL, tmp);
1327 	WREG32(RADEON_DAC_EXT_CNTL,
1333 	WREG32(RADEON_TV_DAC_CNTL,
1341 	WREG32(RADEON_TV_DAC_CNTL,
1361 	WREG32(RADEON_TV_DAC_CNTL, tv_dac_cntl);
1362 	WREG32(RADEON_DAC_EXT_CNTL, dac_ext_cntl);
1363 	WREG32(RADEON_CRTC2_GEN_CNTL, crtc2_gen_cntl);
1364 	WREG32(RADEON_DISP_OUTPUT_CNTL, disp_output_cntl);
1365 	WREG32(RADEON_DAC_CNTL2, dac_cntl2);
1389 	WREG32(RADEON_DAC_CNTL2, tmp);
1398 	WREG32(RADEON_TV_MASTER_CNTL, tmp);
1408 	WREG32(RADEON_TV_DAC_CNTL, tmp);
1415 	WREG32(RADEON_TV_PRE_DAC_MUX_CNTL, tmp);
1427 	WREG32(RADEON_TV_PRE_DAC_MUX_CNTL, tv_pre_dac_mux_cntl);
1428 	WREG32(RADEON_TV_DAC_CNTL, tv_dac_cntl);
1429 	WREG32(RADEON_TV_MASTER_CNTL, tv_master_cntl);
1430 	WREG32(RADEON_DAC_CNTL2, dac_cntl2);
1465 	WREG32(RADEON_GPIO_MONID, tmp);
1467 	WREG32(RADEON_FP2_GEN_CNTL, (RADEON_FP2_ON |
1473 	WREG32(RADEON_DISP_OUTPUT_CNTL, (RADEON_DISP_DAC_SOURCE_RMX |
1476 	WREG32(RADEON_CRTC2_GEN_CNTL, (RADEON_CRTC2_EN |
1479 	WREG32(RADEON_DISP_LIN_TRANS_GRPH_A, 0x00000000);
1480 	WREG32(RADEON_DISP_LIN_TRANS_GRPH_B, 0x000003f0);
1481 	WREG32(RADEON_DISP_LIN_TRANS_GRPH_C, 0x00000000);
1482 	WREG32(RADEON_DISP_LIN_TRANS_GRPH_D, 0x000003f0);
1483 	WREG32(RADEON_DISP_LIN_TRANS_GRPH_E, 0x00000000);
1484 	WREG32(RADEON_DISP_LIN_TRANS_GRPH_F, 0x000003f0);
1486 	WREG32(RADEON_CRTC2_H_TOTAL_DISP, 0x01000008);
1487 	WREG32(RADEON_CRTC2_H_SYNC_STRT_WID, 0x00000800);
1488 	WREG32(RADEON_CRTC2_V_TOTAL_DISP, 0x00080001);
1489 	WREG32(RADEON_CRTC2_V_SYNC_STRT_WID, 0x00000080);
1506 	WREG32(RADEON_DISP_LIN_TRANS_GRPH_A, disp_lin_trans_grph_a);
1507 	WREG32(RADEON_DISP_LIN_TRANS_GRPH_B, disp_lin_trans_grph_b);
1508 	WREG32(RADEON_DISP_LIN_TRANS_GRPH_C, disp_lin_trans_grph_c);
1509 	WREG32(RADEON_DISP_LIN_TRANS_GRPH_D, disp_lin_trans_grph_d);
1510 	WREG32(RADEON_DISP_LIN_TRANS_GRPH_E, disp_lin_trans_grph_e);
1511 	WREG32(RADEON_DISP_LIN_TRANS_GRPH_F, disp_lin_trans_grph_f);
1512 	WREG32(RADEON_CRTC2_H_TOTAL_DISP, crtc2_h_total_disp);
1513 	WREG32(RADEON_CRTC2_V_TOTAL_DISP, crtc2_v_total_disp);
1514 	WREG32(RADEON_CRTC2_H_SYNC_STRT_WID, crtc2_h_sync_strt_wid);
1515 	WREG32(RADEON_CRTC2_V_SYNC_STRT_WID, crtc2_v_sync_strt_wid);
1516 	WREG32(RADEON_CRTC2_GEN_CNTL, crtc2_gen_cntl);
1517 	WREG32(RADEON_DISP_OUTPUT_CNTL, disp_output_cntl);
1518 	WREG32(RADEON_FP2_GEN_CNTL, fp2_gen_cntl);
1519 	WREG32(RADEON_GPIO_MONID, gpio_monid);
1599 		WREG32(RADEON_CRTC_EXT_CNTL, tmp);
1604 		WREG32(RADEON_CRTC2_GEN_CNTL, tmp);
1610 			WREG32(RADEON_DISP_OUTPUT_CNTL, tmp);
1613 			WREG32(RADEON_DISP_HW_DEBUG, tmp);
1622 	WREG32(RADEON_TV_DAC_CNTL, tmp);
1637 	WREG32(RADEON_DAC_EXT_CNTL, tmp);
1640 	WREG32(RADEON_DAC_CNTL2, tmp);
1653 	WREG32(RADEON_DAC_CNTL2, dac_cntl2);
1654 	WREG32(RADEON_DAC_EXT_CNTL, dac_ext_cntl);
1655 	WREG32(RADEON_TV_DAC_CNTL, tv_dac_cntl);
1658 		WREG32(RADEON_CRTC_EXT_CNTL, crtc_ext_cntl);
1660 		WREG32(RADEON_CRTC2_GEN_CNTL, crtc2_gen_cntl);
1662 			WREG32(RADEON_DISP_OUTPUT_CNTL, disp_output_cntl);
1665 			WREG32(RADEON_DISP_HW_DEBUG, disp_hw_debug);