71 	struct panthor_device *ptdev;  member
250 	struct panthor_device *ptdev;  member
280 int panthor_device_init(struct panthor_device *ptdev);
281 void panthor_device_unplug(struct panthor_device *ptdev);
286 static inline void panthor_device_schedule_reset(struct panthor_device *ptdev)  in panthor_device_schedule_reset()  argument
288 	if (!atomic_cmpxchg(&ptdev->reset.pending, 0, 1) &&  in panthor_device_schedule_reset()
289 	    atomic_read(&ptdev->pm.state) == PANTHOR_DEVICE_PM_STATE_ACTIVE)  in panthor_device_schedule_reset()
290 		queue_work(ptdev->reset.wq, &ptdev->reset.work);  in panthor_device_schedule_reset()
298 static inline bool panthor_device_reset_is_pending(struct panthor_device *ptdev)  in panthor_device_reset_is_pending()  argument
300 	return atomic_read(&ptdev->reset.pending) != 0;  in panthor_device_reset_is_pending()
303 int panthor_device_mmap_io(struct panthor_device *ptdev,
309 static inline int panthor_device_resume_and_get(struct panthor_device *ptdev)  in panthor_device_resume_and_get()  argument
311 	int ret = pm_runtime_resume_and_get(ptdev->base.dev);  in panthor_device_resume_and_get()
325 	if (ret && atomic_cmpxchg(&ptdev->pm.recovery_needed, 1, 0) == 1)  in panthor_device_resume_and_get()
326 		pm_runtime_set_suspended(ptdev->base.dev);  in panthor_device_resume_and_get()
394 const char *panthor_exception_name(struct panthor_device *ptdev,
411 	struct panthor_device *ptdev = pirq->ptdev;						\
415 	if (!gpu_read(ptdev, __reg_prefix ## _INT_STAT))					\
418 	gpu_write(ptdev, __reg_prefix ## _INT_MASK, 0);						\
425 	struct panthor_device *ptdev = pirq->ptdev;						\
429 		u32 status = gpu_read(ptdev, __reg_prefix ## _INT_RAWSTAT) & pirq->mask;	\
434 		__handler(ptdev, status);							\
439 		gpu_write(ptdev, __reg_prefix ## _INT_MASK, pirq->mask);			\
447 	gpu_write(pirq->ptdev, __reg_prefix ## _INT_MASK, 0);					\
456 	gpu_write(pirq->ptdev, __reg_prefix ## _INT_CLEAR, mask);				\
457 	gpu_write(pirq->ptdev, __reg_prefix ## _INT_MASK, mask);				\
460 static int panthor_request_ ## __name ## _irq(struct panthor_device *ptdev,			\
464 	pirq->ptdev = ptdev;									\
468 	return devm_request_threaded_irq(ptdev->base.dev, irq,					\
477 static inline void gpu_write(struct panthor_device *ptdev, u32 reg, u32 data)  in gpu_write()  argument
479 	writel(data, ptdev->iomem + reg);  in gpu_write()
482 static inline u32 gpu_read(struct panthor_device *ptdev, u32 reg)  in gpu_read()  argument
484 	return readl(ptdev->iomem + reg);  in gpu_read()
487 static inline u32 gpu_read_relaxed(struct panthor_device *ptdev, u32 reg)  in gpu_read_relaxed()  argument
489 	return readl_relaxed(ptdev->iomem + reg);  in gpu_read_relaxed()
492 static inline void gpu_write64(struct panthor_device *ptdev, u32 reg, u64 data)  in gpu_write64()  argument
494 	gpu_write(ptdev, reg, lower_32_bits(data));  in gpu_write64()
495 	gpu_write(ptdev, reg + 4, upper_32_bits(data));  in gpu_write64()
498 static inline u64 gpu_read64(struct panthor_device *ptdev, u32 reg)  in gpu_read64()  argument
500 	return (gpu_read(ptdev, reg) | ((u64)gpu_read(ptdev, reg + 4) << 32));  in gpu_read64()
503 static inline u64 gpu_read64_relaxed(struct panthor_device *ptdev, u32 reg)  in gpu_read64_relaxed()  argument
505 	return (gpu_read_relaxed(ptdev, reg) |  in gpu_read64_relaxed()
506 		((u64)gpu_read_relaxed(ptdev, reg + 4) << 32));  in gpu_read64_relaxed()
509 static inline u64 gpu_read64_counter(struct panthor_device *ptdev, u32 reg)  in gpu_read64_counter()  argument
513 		hi1 = gpu_read(ptdev, reg + 4);  in gpu_read64_counter()
514 		lo = gpu_read(ptdev, reg);  in gpu_read64_counter()
515 		hi2 = gpu_read(ptdev, reg + 4);  in gpu_read64_counter()