Lines Matching +full:0 +full:x26

18 #define R69328_MACP		0xb0 /* Manufacturer Access CMD Protect */
19 #define   R69328_MACP_ON	0x03
20 #define   R69328_MACP_OFF	0x04
22 #define R69328_GAMMA_SET_A	0xc8 /* Gamma Setting A */
23 #define R69328_GAMMA_SET_B	0xc9 /* Gamma Setting B */
24 #define R69328_GAMMA_SET_C	0xca /* Gamma Setting C */
26 #define R69328_POWER_SET	0xd1
48 	gpiod_set_value_cansleep(priv->reset_gpio, 0);
59 		return 0;
70 	if (ret < 0) {
80 	return 0;
89 	mipi_dsi_dcs_write_seq_multi(&ctx, MIPI_DCS_SET_ADDRESS_MODE, 0x00);
98 	mipi_dsi_generic_write_seq_multi(&ctx, R69328_POWER_SET, 0x14, 0x1d,
99 					 0x21, 0x67, 0x11, 0x9a);
101 	mipi_dsi_generic_write_seq_multi(&ctx, R69328_GAMMA_SET_A, 0x00, 0x1a,
102 					 0x20, 0x28, 0x25, 0x24, 0x26, 0x15, 0x13,
103 					 0x11, 0x18, 0x1e, 0x1c, 0x00, 0x00, 0x1a,
104 					 0x20, 0x28, 0x25, 0x24, 0x26, 0x15, 0x13,
105 					 0x11, 0x18, 0x1e, 0x1c, 0x00);
107 	mipi_dsi_generic_write_seq_multi(&ctx, R69328_GAMMA_SET_B, 0x00, 0x1a,
108 					 0x20, 0x28, 0x25, 0x24, 0x26, 0x15, 0x13,
109 					 0x11, 0x18, 0x1e, 0x1c, 0x00, 0x00, 0x1a,
110 					 0x20, 0x28, 0x25, 0x24, 0x26, 0x15, 0x13,
111 					 0x11, 0x18, 0x1e, 0x1c, 0x00);
113 	mipi_dsi_generic_write_seq_multi(&ctx, R69328_GAMMA_SET_C, 0x00, 0x1a,
114 					 0x20, 0x28, 0x25, 0x24, 0x26, 0x15, 0x13,
115 					 0x11, 0x18, 0x1e, 0x1c, 0x00, 0x00, 0x1a,
116 					 0x20, 0x28, 0x25, 0x24, 0x26, 0x15, 0x13,
117 					 0x11, 0x18, 0x1e, 0x1c, 0x00);
125 	return 0;
137 	return 0;
145 		return 0;
155 	return 0;
247 	return 0;