Lines Matching defs:dsi_ctx
58 struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi };
60 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb0, 0xa5, 0x00);
61 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb2, 0x00, 0x4c);
62 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_SET_3D_CONTROL, 0x10);
63 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_WRITE_POWER_SAVE, DCS_ALLOW_HBM_RANGE);
64 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf8,
67 mipi_dsi_dcs_exit_sleep_mode_multi(&dsi_ctx);
68 mipi_dsi_msleep(&dsi_ctx, 30);
70 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb0, 0xa5, 0x00);
71 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xc0,
74 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xc1, 0x00, 0x00, 0x00, 0x1f, 0x1f,
77 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe2, 0x20, 0x04, 0x10, 0x12, 0x92,
80 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xde, 0x01, 0x2c, 0x00, 0x77, 0x3e);
82 mipi_dsi_msleep(&dsi_ctx, 30);
84 mipi_dsi_dcs_set_display_on_multi(&dsi_ctx);
85 mipi_dsi_msleep(&dsi_ctx, 50);
87 return dsi_ctx.accum_err;
93 struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi };
97 mipi_dsi_dcs_set_display_off_multi(&dsi_ctx);
98 mipi_dsi_msleep(&dsi_ctx, 20);
100 mipi_dsi_dcs_enter_sleep_mode_multi(&dsi_ctx);
101 mipi_dsi_usleep_range(&dsi_ctx, 1000, 2000);
213 struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi };
215 mipi_dsi_dcs_set_display_brightness_multi(&dsi_ctx, brightness);
217 return dsi_ctx.accum_err;