Lines Matching defs:dsi_ctx

36 static void tm5p5_nt35596_on(struct mipi_dsi_multi_context *dsi_ctx)
38 mipi_dsi_generic_write_seq_multi(dsi_ctx, 0xff, 0x05);
39 mipi_dsi_generic_write_seq_multi(dsi_ctx, 0xfb, 0x01);
40 mipi_dsi_generic_write_seq_multi(dsi_ctx, 0xc5, 0x31);
41 mipi_dsi_generic_write_seq_multi(dsi_ctx, 0xff, 0x04);
42 mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x01, 0x84);
43 mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x05, 0x25);
44 mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x06, 0x01);
45 mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x07, 0x20);
46 mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x08, 0x06);
47 mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x09, 0x08);
48 mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x0a, 0x10);
49 mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x0b, 0x10);
50 mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x0c, 0x10);
51 mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x0d, 0x14);
52 mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x0e, 0x14);
53 mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x0f, 0x14);
54 mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x10, 0x14);
55 mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x11, 0x14);
56 mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x12, 0x14);
57 mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x17, 0xf3);
58 mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x18, 0xc0);
59 mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x19, 0xc0);
60 mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x1a, 0xc0);
61 mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x1b, 0xb3);
62 mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x1c, 0xb3);
63 mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x1d, 0xb3);
64 mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x1e, 0xb3);
65 mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x1f, 0xb3);
66 mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x20, 0xb3);
67 mipi_dsi_generic_write_seq_multi(dsi_ctx, 0xfb, 0x01);
68 mipi_dsi_generic_write_seq_multi(dsi_ctx, 0xff, 0x00);
69 mipi_dsi_generic_write_seq_multi(dsi_ctx, 0xfb, 0x01);
70 mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x35, 0x01);
71 mipi_dsi_generic_write_seq_multi(dsi_ctx, 0xd3, 0x06);
72 mipi_dsi_generic_write_seq_multi(dsi_ctx, 0xd4, 0x04);
73 mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x5e, 0x0d);
74 mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x11, 0x00);
76 mipi_dsi_msleep(dsi_ctx, 100);
78 mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x29, 0x00);
79 mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x53, 0x24);
82 static void tm5p5_nt35596_off(struct mipi_dsi_multi_context *dsi_ctx)
84 mipi_dsi_dcs_set_display_off_multi(dsi_ctx);
86 mipi_dsi_msleep(dsi_ctx, 60);
88 mipi_dsi_dcs_enter_sleep_mode_multi(dsi_ctx);
90 mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x4f, 0x01);
96 struct mipi_dsi_multi_context dsi_ctx = {.dsi = ctx->dsi};
98 dsi_ctx.accum_err = regulator_bulk_enable(ARRAY_SIZE(ctx->supplies), ctx->supplies);
99 if (dsi_ctx.accum_err)
100 return dsi_ctx.accum_err;
104 tm5p5_nt35596_on(&dsi_ctx);
106 if (dsi_ctx.accum_err) {
112 return dsi_ctx.accum_err;
118 struct mipi_dsi_multi_context dsi_ctx = {.dsi = ctx->dsi};
120 tm5p5_nt35596_off(&dsi_ctx);
126 return dsi_ctx.accum_err;