Lines Matching refs:dss
39 #include "dss.h"
55 #define REG_GET(dss, idx, start, end) \
56 FLD_GET(dss_read_reg(dss, idx), start, end)
58 #define REG_FLD_MOD(dss, idx, val, start, end) \
59 dss_write_reg(dss, idx, \
60 FLD_MOD(dss_read_reg(dss, idx), val, start, end))
63 int (*dpi_select_source)(struct dss_device *dss, int port,
65 int (*select_lcd_source)(struct dss_device *dss,
95 static inline void dss_write_reg(struct dss_device *dss,
98 __raw_writel(val, dss->base + idx.idx);
101 static inline u32 dss_read_reg(struct dss_device *dss, const struct dss_reg idx)
103 return __raw_readl(dss->base + idx.idx);
106 #define SR(dss, reg) \
107 dss->ctx[(DSS_##reg).idx / sizeof(u32)] = dss_read_reg(dss, DSS_##reg)
108 #define RR(dss, reg) \
109 dss_write_reg(dss, DSS_##reg, dss->ctx[(DSS_##reg).idx / sizeof(u32)])
111 static void dss_save_context(struct dss_device *dss)
115 SR(dss, CONTROL);
117 if (dss->feat->outputs[OMAP_DSS_CHANNEL_LCD] & OMAP_DSS_OUTPUT_SDI) {
118 SR(dss, SDI_CONTROL);
119 SR(dss, PLL_CONTROL);
122 dss->ctx_valid = true;
127 static void dss_restore_context(struct dss_device *dss)
131 if (!dss->ctx_valid)
134 RR(dss, CONTROL);
136 if (dss->feat->outputs[OMAP_DSS_CHANNEL_LCD] & OMAP_DSS_OUTPUT_SDI) {
137 RR(dss, SDI_CONTROL);
138 RR(dss, PLL_CONTROL);
152 if (!pll->dss->syscon_pll_ctrl)
172 regmap_update_bits(pll->dss->syscon_pll_ctrl,
173 pll->dss->syscon_pll_ctrl_offset,
177 static int dss_ctrl_pll_set_control_mux(struct dss_device *dss,
183 if (!dss->syscon_pll_ctrl)
238 regmap_update_bits(dss->syscon_pll_ctrl, dss->syscon_pll_ctrl_offset,
244 void dss_sdi_init(struct dss_device *dss, int datapairs)
250 l = dss_read_reg(dss, DSS_SDI_CONTROL);
254 dss_write_reg(dss, DSS_SDI_CONTROL, l);
256 l = dss_read_reg(dss, DSS_PLL_CONTROL);
260 dss_write_reg(dss, DSS_PLL_CONTROL, l);
263 int dss_sdi_enable(struct dss_device *dss)
267 dispc_pck_free_enable(dss->dispc, 1);
270 REG_FLD_MOD(dss, DSS_PLL_CONTROL, 1, 18, 18); /* SDI_PLL_SYSRESET */
274 REG_FLD_MOD(dss, DSS_PLL_CONTROL, 1, 28, 28); /* SDI_PLL_GOBIT */
278 while (dss_read_reg(dss, DSS_SDI_STATUS) & (1 << 6)) {
286 REG_FLD_MOD(dss, DSS_PLL_CONTROL, 0, 28, 28);
290 while (!(dss_read_reg(dss, DSS_SDI_STATUS) & (1 << 5))) {
297 dispc_lcd_enable_signal(dss->dispc, 1);
301 while (!(dss_read_reg(dss, DSS_SDI_STATUS) & (1 << 2))) {
311 dispc_lcd_enable_signal(dss->dispc, 0);
314 REG_FLD_MOD(dss, DSS_PLL_CONTROL, 0, 18, 18); /* SDI_PLL_SYSRESET */
316 dispc_pck_free_enable(dss->dispc, 0);
321 void dss_sdi_disable(struct dss_device *dss)
323 dispc_lcd_enable_signal(dss->dispc, 0);
325 dispc_pck_free_enable(dss->dispc, 0);
328 REG_FLD_MOD(dss, DSS_PLL_CONTROL, 0, 18, 18); /* SDI_PLL_SYSRESET */
336 static void dss_dump_clocks(struct dss_device *dss, struct seq_file *s)
341 if (dss_runtime_get(dss))
347 fclk_rate = clk_get_rate(dss->dss_clk);
353 dss_runtime_put(dss);
358 struct dss_device *dss = s->private;
360 #define DUMPREG(dss, r) seq_printf(s, "%-35s %08x\n", #r, dss_read_reg(dss, r))
362 if (dss_runtime_get(dss))
365 DUMPREG(dss, DSS_REVISION);
366 DUMPREG(dss, DSS_SYSCONFIG);
367 DUMPREG(dss, DSS_SYSSTATUS);
368 DUMPREG(dss, DSS_CONTROL);
370 if (dss->feat->outputs[OMAP_DSS_CHANNEL_LCD] & OMAP_DSS_OUTPUT_SDI) {
371 DUMPREG(dss, DSS_SDI_CONTROL);
372 DUMPREG(dss, DSS_PLL_CONTROL);
373 DUMPREG(dss, DSS_SDI_STATUS);
376 dss_runtime_put(dss);
383 struct dss_device *dss = s->private;
385 dss_dump_clocks(dss, s);
386 dispc_dump_clocks(dss->dispc, s);
405 static void dss_select_dispc_clk_source(struct dss_device *dss,
414 if (WARN_ON(dss->feat->has_lcd_clk_src && clk_src != DSS_CLK_SRC_FCK))
432 REG_FLD_MOD(dss, DSS_CONTROL, b, /* DISPC_CLK_SWITCH */
433 dss->feat->dispc_clk_switch.start,
434 dss->feat->dispc_clk_switch.end);
436 dss->dispc_clk_source = clk_src;
439 void dss_select_dsi_clk_source(struct dss_device *dss, int dsi_module,
462 REG_FLD_MOD(dss, DSS_CONTROL, b, pos, pos); /* DSIx_CLK_SWITCH */
464 dss->dsi_clk_source[dsi_module] = clk_src;
467 static int dss_lcd_clk_mux_dra7(struct dss_device *dss,
482 REG_FLD_MOD(dss, DSS_CONTROL, 0, ctrl_bit, ctrl_bit);
486 r = dss_ctrl_pll_set_control_mux(dss, clk_src, channel);
490 REG_FLD_MOD(dss, DSS_CONTROL, 1, ctrl_bit, ctrl_bit);
495 static int dss_lcd_clk_mux_omap5(struct dss_device *dss,
514 REG_FLD_MOD(dss, DSS_CONTROL, 0, ctrl_bit, ctrl_bit);
521 REG_FLD_MOD(dss, DSS_CONTROL, 1, ctrl_bit, ctrl_bit);
526 static int dss_lcd_clk_mux_omap4(struct dss_device *dss,
543 REG_FLD_MOD(dss, DSS_CONTROL, 0, ctrl_bit, ctrl_bit);
550 REG_FLD_MOD(dss, DSS_CONTROL, 1, ctrl_bit, ctrl_bit);
555 void dss_select_lcd_clk_source(struct dss_device *dss,
562 if (!dss->feat->has_lcd_clk_src) {
563 dss_select_dispc_clk_source(dss, clk_src);
564 dss->lcd_clk_source[idx] = clk_src;
568 r = dss->feat->ops->select_lcd_source(dss, channel, clk_src);
572 dss->lcd_clk_source[idx] = clk_src;
575 enum dss_clk_source dss_get_dispc_clk_source(struct dss_device *dss)
577 return dss->dispc_clk_source;
580 enum dss_clk_source dss_get_dsi_clk_source(struct dss_device *dss,
583 return dss->dsi_clk_source[dsi_module];
586 enum dss_clk_source dss_get_lcd_clk_source(struct dss_device *dss,
589 if (dss->feat->has_lcd_clk_src) {
591 return dss->lcd_clk_source[idx];
595 return dss->dispc_clk_source;
599 bool dss_div_calc(struct dss_device *dss, unsigned long pck,
609 fck_hw_max = dss->feat->fck_freq_max;
611 if (dss->parent_clk == NULL) {
618 fck = clk_round_rate(dss->dss_clk, fck);
623 fckd_hw_max = dss->feat->fck_div_max;
625 m = dss->feat->dss_fck_multiplier;
626 prate = clk_get_rate(dss->parent_clk);
643 int dss_set_fck_rate(struct dss_device *dss, unsigned long rate)
649 r = clk_set_rate(dss->dss_clk, rate);
653 dss->dss_clk_rate = clk_get_rate(dss->dss_clk);
655 WARN_ONCE(dss->dss_clk_rate != rate, "clk rate mismatch: %lu != %lu",
656 dss->dss_clk_rate, rate);
661 unsigned long dss_get_dispc_clk_rate(struct dss_device *dss)
663 return dss->dss_clk_rate;
666 unsigned long dss_get_max_fck_rate(struct dss_device *dss)
668 return dss->feat->fck_freq_max;
671 static int dss_setup_default_clock(struct dss_device *dss)
678 max_dss_fck = dss->feat->fck_freq_max;
680 if (dss->parent_clk == NULL) {
681 fck = clk_round_rate(dss->dss_clk, max_dss_fck);
683 prate = clk_get_rate(dss->parent_clk);
685 fck_div = DIV_ROUND_UP(prate * dss->feat->dss_fck_multiplier,
688 * dss->feat->dss_fck_multiplier;
691 r = dss_set_fck_rate(dss, fck);
698 void dss_set_venc_output(struct dss_device *dss, enum omap_dss_venc_type type)
710 REG_FLD_MOD(dss, DSS_CONTROL, l, 6, 6);
713 void dss_set_dac_pwrdn_bgz(struct dss_device *dss, bool enable)
716 REG_FLD_MOD(dss, DSS_CONTROL, enable, 5, 5);
719 void dss_select_hdmi_venc_clk_source(struct dss_device *dss,
724 outputs = dss->feat->outputs[OMAP_DSS_CHANNEL_DIGIT];
734 REG_FLD_MOD(dss, DSS_CONTROL, src, 15, 15);
737 static int dss_dpi_select_source_omap2_omap3(struct dss_device *dss, int port,
746 static int dss_dpi_select_source_omap4(struct dss_device *dss, int port,
762 REG_FLD_MOD(dss, DSS_CONTROL, val, 17, 17);
767 static int dss_dpi_select_source_omap5(struct dss_device *dss, int port,
789 REG_FLD_MOD(dss, DSS_CONTROL, val, 17, 16);
794 static int dss_dpi_select_source_dra7xx(struct dss_device *dss, int port,
799 return dss_dpi_select_source_omap5(dss, port, channel);
815 int dss_dpi_select_source(struct dss_device *dss, int port,
818 return dss->feat->ops->dpi_select_source(dss, port, channel);
821 static int dss_get_clocks(struct dss_device *dss)
825 clk = devm_clk_get(&dss->pdev->dev, "fck");
831 dss->dss_clk = clk;
833 if (dss->feat->parent_clk_name) {
834 clk = clk_get(NULL, dss->feat->parent_clk_name);
837 dss->feat->parent_clk_name);
844 dss->parent_clk = clk;
849 static void dss_put_clocks(struct dss_device *dss)
851 if (dss->parent_clk)
852 clk_put(dss->parent_clk);
855 int dss_runtime_get(struct dss_device *dss)
861 r = pm_runtime_get_sync(&dss->pdev->dev);
863 pm_runtime_put_noidle(&dss->pdev->dev);
869 void dss_runtime_put(struct dss_device *dss)
875 r = pm_runtime_put_sync(&dss->pdev->dev);
886 static int dss_initialize_debugfs(struct dss_device *dss)
894 dss->debugfs.root = dir;
899 static void dss_uninitialize_debugfs(struct dss_device *dss)
901 debugfs_remove_recursive(dss->debugfs.root);
925 dss_debugfs_create_file(struct dss_device *dss, const char *name,
937 entry->dentry = debugfs_create_file(name, 0444, dss->debugfs.root,
953 static inline int dss_initialize_debugfs(struct dss_device *dss)
957 static inline void dss_uninitialize_debugfs(struct dss_device *dss)
1158 static void __dss_uninit_ports(struct dss_device *dss, unsigned int num_ports)
1160 struct platform_device *pdev = dss->pdev;
1170 switch (dss->feat->ports[i]) {
1184 static int dss_init_ports(struct dss_device *dss)
1186 struct platform_device *pdev = dss->pdev;
1192 for (i = 0; i < dss->feat->num_ports; i++) {
1197 switch (dss->feat->ports[i]) {
1199 r = dpi_init_port(dss, pdev, port, dss->feat->model);
1205 r = sdi_init_port(dss, pdev, port);
1220 __dss_uninit_ports(dss, i);
1224 static void dss_uninit_ports(struct dss_device *dss)
1226 __dss_uninit_ports(dss, dss->feat->num_ports);
1229 static int dss_video_pll_probe(struct dss_device *dss)
1231 struct platform_device *pdev = dss->pdev;
1240 dss->syscon_pll_ctrl =
1242 1, &dss->syscon_pll_ctrl_offset);
1243 if (IS_ERR(dss->syscon_pll_ctrl)) {
1246 return PTR_ERR(dss->syscon_pll_ctrl);
1269 dss->video1_pll = dss_video_pll_init(dss, pdev, 0,
1271 if (IS_ERR(dss->video1_pll))
1272 return PTR_ERR(dss->video1_pll);
1276 dss->video2_pll = dss_video_pll_init(dss, pdev, 1,
1278 if (IS_ERR(dss->video2_pll)) {
1279 dss_video_pll_uninit(dss->video1_pll);
1280 return PTR_ERR(dss->video2_pll);
1289 { .compatible = "ti,omap2-dss", .data = &omap24xx_dss_feats },
1290 { .compatible = "ti,omap3-dss", .data = &omap3630_dss_feats },
1291 { .compatible = "ti,omap4-dss", .data = &omap44xx_dss_feats },
1292 { .compatible = "ti,omap5-dss", .data = &omap54xx_dss_feats },
1293 { .compatible = "ti,dra7-dss", .data = &dra7xx_dss_feats },
1307 struct dss_device *dss = dev_get_drvdata(dev);
1318 pdata.dss = dss;
1326 dss->drm_pdev = drm_pdev;
1333 struct dss_device *dss = dev_get_drvdata(dev);
1335 platform_device_unregister(dss->drm_pdev);
1358 * Otherwise dss will never get probed successfully, as it will wait
1379 static int dss_probe_hardware(struct dss_device *dss)
1384 r = dss_runtime_get(dss);
1388 dss->dss_clk_rate = clk_get_rate(dss->dss_clk);
1391 REG_FLD_MOD(dss, DSS_CONTROL, 0, 0, 0);
1393 dss_select_dispc_clk_source(dss, DSS_CLK_SRC_FCK);
1396 REG_FLD_MOD(dss, DSS_CONTROL, 1, 4, 4); /* venc dac demen */
1397 REG_FLD_MOD(dss, DSS_CONTROL, 1, 3, 3); /* venc clock 4x enable */
1398 REG_FLD_MOD(dss, DSS_CONTROL, 0, 2, 2); /* venc clock mode = normal */
1400 dss->dsi_clk_source[0] = DSS_CLK_SRC_FCK;
1401 dss->dsi_clk_source[1] = DSS_CLK_SRC_FCK;
1402 dss->dispc_clk_source = DSS_CLK_SRC_FCK;
1403 dss->lcd_clk_source[0] = DSS_CLK_SRC_FCK;
1404 dss->lcd_clk_source[1] = DSS_CLK_SRC_FCK;
1406 rev = dss_read_reg(dss, DSS_REVISION);
1409 dss_runtime_put(dss);
1419 struct dss_device *dss;
1422 dss = kzalloc(sizeof(*dss), GFP_KERNEL);
1423 if (!dss)
1426 dss->pdev = pdev;
1427 platform_set_drvdata(pdev, dss);
1441 dss->feat = soc->data;
1443 dss->feat = device_get_match_data(&pdev->dev);
1446 dss->base = devm_platform_ioremap_resource(pdev, 0);
1447 if (IS_ERR(dss->base)) {
1448 r = PTR_ERR(dss->base);
1452 r = dss_get_clocks(dss);
1456 r = dss_setup_default_clock(dss);
1461 r = dss_video_pll_probe(dss);
1465 r = dss_init_ports(dss);
1472 r = dss_probe_hardware(dss);
1477 r = dss_initialize_debugfs(dss);
1481 dss->debugfs.clk = dss_debugfs_create_file(dss, "clk",
1482 dss_debug_dump_clocks, dss);
1483 dss->debugfs.dss = dss_debugfs_create_file(dss, "dss", dss_dump_regs,
1484 dss);
1507 dss_debugfs_remove_file(dss->debugfs.clk);
1508 dss_debugfs_remove_file(dss->debugfs.dss);
1509 dss_uninitialize_debugfs(dss);
1513 dss_uninit_ports(dss);
1516 if (dss->video1_pll)
1517 dss_video_pll_uninit(dss->video1_pll);
1518 if (dss->video2_pll)
1519 dss_video_pll_uninit(dss->video2_pll);
1522 dss_put_clocks(dss);
1525 kfree(dss);
1532 struct dss_device *dss = platform_get_drvdata(pdev);
1538 dss_debugfs_remove_file(dss->debugfs.clk);
1539 dss_debugfs_remove_file(dss->debugfs.dss);
1540 dss_uninitialize_debugfs(dss);
1544 dss_uninit_ports(dss);
1546 if (dss->video1_pll)
1547 dss_video_pll_uninit(dss->video1_pll);
1549 if (dss->video2_pll)
1550 dss_video_pll_uninit(dss->video2_pll);
1552 dss_put_clocks(dss);
1554 kfree(dss);
1564 struct dss_device *dss = dev_get_drvdata(dev);
1566 dss_save_context(dss);
1576 struct dss_device *dss = dev_get_drvdata(dev);
1592 dss_restore_context(dss);