Lines Matching refs:tpc
1296 gf100_gr_trap_mp(struct gf100_gr *gr, int gpc, int tpc)
1300 u32 werr = nvkm_rd32(device, TPC_UNIT(gpc, tpc, 0x648));
1301 u32 gerr = nvkm_rd32(device, TPC_UNIT(gpc, tpc, 0x650));
1310 gpc, tpc, gerr, glob, werr, warp ? warp->name : "");
1312 nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x648), 0x00000000);
1313 nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x650), gerr);
1317 gf100_gr_trap_tpc(struct gf100_gr *gr, int gpc, int tpc)
1321 u32 stat = nvkm_rd32(device, TPC_UNIT(gpc, tpc, 0x0508));
1324 u32 trap = nvkm_rd32(device, TPC_UNIT(gpc, tpc, 0x0224));
1325 nvkm_error(subdev, "GPC%d/TPC%d/TEX: %08x\n", gpc, tpc, trap);
1326 nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x0224), 0xc0000000);
1331 gr->func->trap_mp(gr, gpc, tpc);
1336 u32 trap = nvkm_rd32(device, TPC_UNIT(gpc, tpc, 0x0084));
1337 nvkm_error(subdev, "GPC%d/TPC%d/POLY: %08x\n", gpc, tpc, trap);
1338 nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x0084), 0xc0000000);
1343 u32 trap = nvkm_rd32(device, TPC_UNIT(gpc, tpc, 0x048c));
1344 nvkm_error(subdev, "GPC%d/TPC%d/L1C: %08x\n", gpc, tpc, trap);
1345 nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x048c), 0xc0000000);
1350 u32 trap = nvkm_rd32(device, TPC_UNIT(gpc, tpc, 0x0430));
1351 nvkm_error(subdev, "GPC%d/TPC%d/MPC: %08x\n", gpc, tpc, trap);
1352 nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x0430), 0xc0000000);
1357 nvkm_error(subdev, "GPC%d/TPC%d/%08x: unknown\n", gpc, tpc, stat);
1367 int tpc;
1395 for (tpc = 0; tpc < gr->tpc_nr[gpc]; tpc++) {
1396 u32 mask = 0x00010000 << tpc;
1398 gf100_gr_trap_tpc(gr, gpc, tpc);
1864 gf100_gr_init_csdata(gr, grctx->tpc, 0x41a000, 0x004, 0x419800);
1898 int tpc, gpc;
1900 for (tpc = 0; tpc < gr->tpc_max; tpc++) {
1902 if (tpc < gr->tpc_nr[gpc]) {
1904 gr->sm[gr->sm_nr].tpc = tpc;
2216 gf100_gr_init_shader_exceptions(struct gf100_gr *gr, int gpc, int tpc)
2219 nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x644), 0x001ffffe);
2220 nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x64c), 0x0000000f);
2224 gf100_gr_init_tex_hww_esr(struct gf100_gr *gr, int gpc, int tpc)
2227 nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x224), 0xc0000000);
2241 int gpc, tpc;
2246 for (tpc = 0; tpc < gr->tpc_nr[gpc]; tpc++)
2247 nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x48c), 0xc0000000);
2346 int gpc, tpc;
2432 for (tpc = 0; tpc < gr->tpc_nr[gpc]; tpc++) {
2433 nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x508), 0xffffffff);
2434 nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x50c), 0xffffffff);
2436 gr->func->init_tex_hww_esr(gr, gpc, tpc);
2437 nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x084), 0xc0000000);
2439 gr->func->init_504430(gr, gpc, tpc);
2440 gr->func->init_shader_exceptions(gr, gpc, tpc);