Lines Matching refs:sim_data

199 	struct nv_sim_state sim_data;
205 	sim_data.pclk_khz = VClk;
206 	sim_data.mclk_khz = MClk;
207 	sim_data.nvclk_khz = NVClk;
208 	sim_data.bpp = bpp;
209 	sim_data.two_heads = nv_two_heads(dev);
218 		sim_data.memory_type = (type >> 12) & 1;
219 		sim_data.memory_width = 64;
220 		sim_data.mem_latency = 3;
221 		sim_data.mem_page_miss = 10;
223 		sim_data.memory_type = nvif_rd32(device, NV04_PFB_CFG0) & 0x1;
224 		sim_data.memory_width = (nvif_rd32(device, NV_PEXTDEV_BOOT_0) & 0x10) ? 128 : 64;
225 		sim_data.mem_latency = cfg1 & 0xf;
226 		sim_data.mem_page_miss = ((cfg1 >> 4) & 0xf) + ((cfg1 >> 31) & 0x1);
230 		nv04_calc_arb(&fifo_data, &sim_data);
232 		nv10_calc_arb(&fifo_data, &sim_data);