196 static inline void dsi_write(struct msm_dsi_host *msm_host, u32 reg, u32 data)  in dsi_write()  function
743 	dsi_write(msm_host, REG_DSI_INTR_CTRL, intr);  in dsi_intr_ctrl()
785 	dsi_write(msm_host, REG_DSI_CTRL, 0);  in dsi_ctrl_disable()
832 		dsi_write(msm_host, REG_DSI_VID_CFG0, data);  in dsi_ctrl_enable()
836 		dsi_write(msm_host, REG_DSI_VID_CFG1, 0);  in dsi_ctrl_enable()
841 		dsi_write(msm_host, REG_DSI_CMD_CFG0, data);  in dsi_ctrl_enable()
848 		dsi_write(msm_host, REG_DSI_CMD_CFG1, data);  in dsi_ctrl_enable()
859 			dsi_write(msm_host, REG_DSI_CMD_MODE_MDP_CTRL2, data);  in dsi_ctrl_enable()
863 	dsi_write(msm_host, REG_DSI_CMD_DMA_CTRL,  in dsi_ctrl_enable()
876 	dsi_write(msm_host, REG_DSI_TRIG_CTRL, data);  in dsi_ctrl_enable()
880 	dsi_write(msm_host, REG_DSI_CLKOUT_TIMING_CTRL, data);  in dsi_ctrl_enable()
885 		dsi_write(msm_host, REG_DSI_T_CLK_PRE_EXTEND,  in dsi_ctrl_enable()
891 	dsi_write(msm_host, REG_DSI_EOT_PACKET_CTRL, data);  in dsi_ctrl_enable()
894 	dsi_write(msm_host, REG_DSI_ERR_INT_MASK0, 0x13ff3fe0);  in dsi_ctrl_enable()
898 	dsi_write(msm_host, REG_DSI_CLK_CTRL, DSI_CLK_CTRL_ENABLE_CLKS);  in dsi_ctrl_enable()
905 	dsi_write(msm_host, REG_DSI_LANE_SWAP_CTRL,  in dsi_ctrl_enable()
914 		dsi_write(msm_host, REG_DSI_LANE_CTRL,  in dsi_ctrl_enable()
920 	dsi_write(msm_host, REG_DSI_CTRL, data);  in dsi_ctrl_enable()
923 		dsi_write(msm_host, REG_DSI_CPHY_MODE_CTRL, BIT(0));  in dsi_ctrl_enable()
980 		dsi_write(msm_host, REG_DSI_COMMAND_COMPRESSION_MODE_CTRL, reg_ctrl);  in dsi_update_dsc_timing()
981 		dsi_write(msm_host, REG_DSI_COMMAND_COMPRESSION_MODE_CTRL2, reg_ctrl2);  in dsi_update_dsc_timing()
984 		dsi_write(msm_host, REG_DSI_VIDEO_COMPRESSION_MODE_CTRL, reg);  in dsi_update_dsc_timing()
1080 		dsi_write(msm_host, REG_DSI_ACTIVE_H,  in dsi_timing_setup()
1083 		dsi_write(msm_host, REG_DSI_ACTIVE_V,  in dsi_timing_setup()
1086 		dsi_write(msm_host, REG_DSI_TOTAL,  in dsi_timing_setup()
1090 		dsi_write(msm_host, REG_DSI_ACTIVE_HSYNC,  in dsi_timing_setup()
1093 		dsi_write(msm_host, REG_DSI_ACTIVE_VSYNC_HPOS, 0);  in dsi_timing_setup()
1094 		dsi_write(msm_host, REG_DSI_ACTIVE_VSYNC_VPOS,  in dsi_timing_setup()
1114 		dsi_write(msm_host, REG_DSI_CMD_MDP_STREAM0_CTRL,  in dsi_timing_setup()
1121 		dsi_write(msm_host, REG_DSI_CMD_MDP_STREAM0_TOTAL,  in dsi_timing_setup()
1134 		dsi_write(msm_host, REG_DSI_CTRL, ctrl & ~DSI_CTRL_ENABLE);  in dsi_sw_reset()
1142 	dsi_write(msm_host, REG_DSI_CLK_CTRL, DSI_CLK_CTRL_ENABLE_CLKS);  in dsi_sw_reset()
1146 	dsi_write(msm_host, REG_DSI_RESET, 1);  in dsi_sw_reset()
1148 	dsi_write(msm_host, REG_DSI_RESET, 0);  in dsi_sw_reset()
1152 		dsi_write(msm_host, REG_DSI_CTRL, ctrl);  in dsi_sw_reset()
1179 	dsi_write(msm_host, REG_DSI_CTRL, dsi_ctrl);  in dsi_op_mode_config()
1193 	dsi_write(msm_host, REG_DSI_CMD_DMA_CTRL, data);  in dsi_set_tx_power_mode()
1589 		dsi_write(msm_host, REG_DSI_ACK_ERR_STATUS, status);  in dsi_ack_err_status()
1591 		dsi_write(msm_host, REG_DSI_ACK_ERR_STATUS, 0);  in dsi_ack_err_status()
1603 		dsi_write(msm_host, REG_DSI_TIMEOUT_STATUS, status);  in dsi_timeout_status()
1619 		dsi_write(msm_host, REG_DSI_DLN0_PHY_ERR, status);  in dsi_dln0_phy_err()
1632 		dsi_write(msm_host, REG_DSI_FIFO_STATUS, status);  in dsi_fifo_status()
1647 		dsi_write(msm_host, REG_DSI_STATUS0, status);  in dsi_status()
1660 		dsi_write(msm_host, REG_DSI_CLK_STATUS, status);  in dsi_clk_status()
1691 	dsi_write(msm_host, REG_DSI_INTR_CTRL, isr);  in dsi_host_irq()
2181 	dsi_write(msm_host, REG_DSI_CTRL,  in msm_dsi_host_xfer_prepare()
2197 	dsi_write(msm_host, REG_DSI_CTRL, msm_host->dma_cmd_ctrl_restore);  in msm_dsi_host_xfer_restore()
2265 			dsi_write(msm_host, REG_DSI_RDBK_DATA_CTRL,  in msm_dsi_host_cmd_rx()
2268 			dsi_write(msm_host, REG_DSI_RDBK_DATA_CTRL, 0);  in msm_dsi_host_cmd_rx()
2359 	dsi_write(msm_host, REG_DSI_DMA_BASE, dma_base);  in msm_dsi_host_cmd_xfer_commit()
2360 	dsi_write(msm_host, REG_DSI_DMA_LEN, len);  in msm_dsi_host_cmd_xfer_commit()
2361 	dsi_write(msm_host, REG_DSI_TRIG_DMA, 1);  in msm_dsi_host_cmd_xfer_commit()
2380 	dsi_write(msm_host, REG_DSI_PHY_RESET, DSI_PHY_RESET_RESET);  in msm_dsi_host_reset_phy()
2384 	dsi_write(msm_host, REG_DSI_PHY_RESET, 0);  in msm_dsi_host_reset_phy()
2643 	dsi_write(msm_host, REG_DSI_TEST_PATTERN_GEN_VIDEO_INIT_VAL, 0xff);  in msm_dsi_host_video_test_pattern_setup()
2645 	dsi_write(msm_host, REG_DSI_TPG_MAIN_CONTROL,  in msm_dsi_host_video_test_pattern_setup()
2648 	dsi_write(msm_host, REG_DSI_TPG_VIDEO_CONFIG,  in msm_dsi_host_video_test_pattern_setup()
2653 	dsi_write(msm_host, REG_DSI_TEST_PATTERN_GEN_CTRL, reg);  in msm_dsi_host_video_test_pattern_setup()
2665 	dsi_write(msm_host, REG_DSI_TEST_PATTERN_GEN_CMD_MDP_INIT_VAL0, 0xff);  in msm_dsi_host_cmd_test_pattern_setup()
2669 	dsi_write(msm_host, REG_DSI_TEST_PATTERN_GEN_CTRL, reg);  in msm_dsi_host_cmd_test_pattern_setup()
2671 	dsi_write(msm_host, REG_DSI_TPG_MAIN_CONTROL2,  in msm_dsi_host_cmd_test_pattern_setup()
2690 	dsi_write(msm_host, REG_DSI_TEST_PATTERN_GEN_CTRL, (reg | DSI_TEST_PATTERN_GEN_CTRL_EN));  in msm_dsi_host_test_pattern_en()
2694 		dsi_write(msm_host, REG_DSI_TEST_PATTERN_GEN_CMD_STREAM0_TRIGGER,  in msm_dsi_host_test_pattern_en()