msm/adreno/a6xx_gpu_state.c

155 	if (!a6xx_gmu_sptprac_is_on(&a6xx_gpu->gmu))
1181 	struct a6xx_gmu *gmu = &a6xx_gpu->gmu;
1201 				val = gmu_read_rscc(gmu, offset);
1203 				val = gmu_read(gmu, offset);
1237 	if (!a6xx_gmu_gx_is_on(&a6xx_gpu->gmu))
1275 	struct a6xx_gmu *gmu = &a6xx_gpu->gmu;
1278 	BUILD_BUG_ON(ARRAY_SIZE(gmu->queues) != ARRAY_SIZE(a6xx_state->hfi_queue_history));
1280 	for (i = 0; i < ARRAY_SIZE(gmu->queues); i++) {
1281 		struct a6xx_hfi_queue *queue = &gmu->queues[i];
1586 		a6xx_state->gmu_log = a6xx_snapshot_gmu_bo(a6xx_state, &a6xx_gpu->gmu.log);
1587 		a6xx_state->gmu_hfi = a6xx_snapshot_gmu_bo(a6xx_state, &a6xx_gpu->gmu.hfi);
1588 		a6xx_state->gmu_debug = a6xx_snapshot_gmu_bo(a6xx_state, &a6xx_gpu->gmu.debug);
1594 	if (!adreno_has_gmu_wrapper(adreno_gpu) && !a6xx_gmu_gx_is_on(&a6xx_gpu->gmu))
1968 	drm_puts(p, "gmu-log:\n");
1978 	drm_puts(p, "gmu-hfi:\n");
1996 	drm_puts(p, "gmu-debug:\n");
2022 	drm_puts(p, "registers-gmu:\n");