Lines Matching refs:target_lane_count
1599 u8 target_lane_count)
1605 target_lane_count | DP_LANE_COUNT_ENHANCED_FRAME_EN);
1611 mtk_dp_set_lanes(mtk_dp, target_lane_count / 2);
1612 ret = mtk_dp_phy_configure(mtk_dp, target_link_rate, target_lane_count);
1617 "Link train target_link_rate = 0x%x, target_lane_count = 0x%x\n",
1618 target_link_rate, target_lane_count);
1623 static int mtk_dp_train_cr(struct mtk_dp *mtk_dp, u8 target_lane_count)
1643 mtk_dp_train_update_swing_pre(mtk_dp, target_lane_count,
1652 target_lane_count)) {
1694 static int mtk_dp_train_eq(struct mtk_dp *mtk_dp, u8 target_lane_count)
1711 mtk_dp_train_update_swing_pre(mtk_dp, target_lane_count,
1719 if (drm_dp_channel_eq_ok(link_status, target_lane_count)) {