Lines Matching defs:sync
496 u32 sync;
504 sync = MCDE_CHNL0SYNCHMOD;
511 sync = MCDE_CHNL1SYNCHMOD;
518 sync = MCDE_CHNL2SYNCHMOD;
525 sync = MCDE_CHNL3SYNCHMOD;
532 /* Set up channel 0 sync (based on chnl_update_registers()) */
535 /* Oneshot is achieved with software sync */
550 * The vendor driver uses the formatter as sync source
576 writel(val, mcde->regs + sync);
605 * If using DPI configure the sync event.
757 u32 sync;
766 sync = MCDE_DSIVID0SYNC;
775 sync = MCDE_DSIVID1SYNC;
784 sync = MCDE_DSIVID2SYNC;
828 writel(0, mcde->regs + sync);
951 /* Trigger a software sync out on respective channel (0-3) */
1032 /* Front porch and sync width */
1048 /* Horizongal sync width and horizonal front porch, 0 = 1 cycle */
1057 /* Set up sync inversion etc */
1355 /* Trigger a software sync out on channel 0 */
1360 * Disable FIFO A flow again: since we are using TE sync we