52 	const struct pvr_fw_layout_entry *layout_entries = pvr_dev->fw_dev.layout_entries;  in pvr_fw_find_layout_entry()
53 	u32 num_layout_entries = pvr_dev->fw_dev.header->layout_entry_num;  in pvr_fw_find_layout_entry()
66 	const struct pvr_fw_layout_entry *layout_entries = pvr_dev->fw_dev.layout_entries;  in pvr_fw_find_private_data()
67 	u32 num_layout_entries = pvr_dev->fw_dev.header->layout_entry_num;  in pvr_fw_find_private_data()
93 	const struct firmware *firmware = pvr_dev->fw_dev.firmware;  in pvr_fw_validate()
161 	pvr_dev->fw_dev.header = header;  in pvr_fw_validate()
162 	pvr_dev->fw_dev.layout_entries = layout_entries;  in pvr_fw_validate()
170 	const struct firmware *firmware = pvr_dev->fw_dev.firmware;  in pvr_fw_get_device_info()
176 	fw_offset = (firmware->size - SZ_4K) - pvr_dev->fw_dev.header->device_info_size;  in pvr_fw_get_device_info()
194 	const struct pvr_fw_layout_entry *layout_entries = pvr_dev->fw_dev.layout_entries;  in layout_get_sizes()
195 	u32 num_layout_entries = pvr_dev->fw_dev.header->layout_entry_num;  in layout_get_sizes()
196 	struct pvr_fw_mem *fw_mem = &pvr_dev->fw_dev.mem;  in layout_get_sizes()
231 	const struct pvr_fw_layout_entry *layout_entries = pvr_dev->fw_dev.layout_entries;  in pvr_fw_find_mmu_segment()
232 	u32 num_layout_entries = pvr_dev->fw_dev.header->layout_entry_num;  in pvr_fw_find_mmu_segment()
285 	struct pvr_fw_device *fw_dev = &pvr_dev->fw_dev;  in pvr_fw_create_fwif_connection_ctl()  local
287 	fw_dev->fwif_connection_ctl =  in pvr_fw_create_fwif_connection_ctl()
289 						    fw_dev->fw_heap_info.config_offset +  in pvr_fw_create_fwif_connection_ctl()
291 						    sizeof(*fw_dev->fwif_connection_ctl),  in pvr_fw_create_fwif_connection_ctl()
294 						    &fw_dev->mem.fwif_connection_ctl_obj);  in pvr_fw_create_fwif_connection_ctl()
295 	if (IS_ERR(fw_dev->fwif_connection_ctl)) {  in pvr_fw_create_fwif_connection_ctl()
298 		return PTR_ERR(fw_dev->fwif_connection_ctl);  in pvr_fw_create_fwif_connection_ctl()
307 	struct pvr_fw_device *fw_dev = &pvr_dev->fw_dev;  in pvr_fw_fini_fwif_connection_ctl()  local
309 	pvr_fw_object_unmap_and_destroy(fw_dev->mem.fwif_connection_ctl_obj);  in pvr_fw_fini_fwif_connection_ctl()
317 	struct pvr_fw_device *fw_dev = &pvr_dev->fw_dev;  in fw_osinit_init()  local
318 	struct pvr_fw_mem *fw_mem = &fw_dev->mem;  in fw_osinit_init()
346 	struct pvr_fw_mem *fw_mem = &pvr_dev->fw_dev.mem;  in fw_osdata_init()
365 	struct pvr_fw_device *fw_dev = &pvr_dev->fw_dev;  in fw_sysinit_init()  local
366 	struct pvr_fw_mem *fw_mem = &fw_dev->mem;  in fw_sysinit_init()
379 	pvr_fw_object_get_fw_addr(fw_dev->fw_trace.tracebuf_ctrl_obj,  in fw_sysinit_init()
458 	struct pvr_fw_device *fw_dev = &pvr_dev->fw_dev;  in pvr_fw_create_structures()  local
459 	struct pvr_fw_mem *fw_mem = &fw_dev->mem;  in pvr_fw_create_structures()
462 	fw_dev->power_sync = pvr_fw_object_create_and_map(pvr_dev, sizeof(*fw_dev->power_sync),  in pvr_fw_create_structures()
465 	if (IS_ERR(fw_dev->power_sync)) {  in pvr_fw_create_structures()
467 		return PTR_ERR(fw_dev->power_sync);  in pvr_fw_create_structures()
470 	fw_dev->hwrinfobuf = pvr_fw_object_create_and_map(pvr_dev, sizeof(*fw_dev->hwrinfobuf),  in pvr_fw_create_structures()
473 	if (IS_ERR(fw_dev->hwrinfobuf)) {  in pvr_fw_create_structures()
476 		err = PTR_ERR(fw_dev->hwrinfobuf);  in pvr_fw_create_structures()
489 	fw_dev->fwif_sysdata = pvr_fw_object_create_and_map(pvr_dev,  in pvr_fw_create_structures()
490 							    sizeof(*fw_dev->fwif_sysdata),  in pvr_fw_create_structures()
494 	if (IS_ERR(fw_dev->fwif_sysdata)) {  in pvr_fw_create_structures()
496 		err = PTR_ERR(fw_dev->fwif_sysdata);  in pvr_fw_create_structures()
528 	fw_dev->fwif_osdata = pvr_fw_object_create_and_map(pvr_dev,  in pvr_fw_create_structures()
529 							   sizeof(*fw_dev->fwif_osdata),  in pvr_fw_create_structures()
533 	if (IS_ERR(fw_dev->fwif_osdata)) {  in pvr_fw_create_structures()
535 		err = PTR_ERR(fw_dev->fwif_osdata);  in pvr_fw_create_structures()
539 	fw_dev->fwif_osinit =  in pvr_fw_create_structures()
541 						    fw_dev->fw_heap_info.config_offset +  in pvr_fw_create_structures()
543 						    sizeof(*fw_dev->fwif_osinit),  in pvr_fw_create_structures()
546 	if (IS_ERR(fw_dev->fwif_osinit)) {  in pvr_fw_create_structures()
548 		err = PTR_ERR(fw_dev->fwif_osinit);  in pvr_fw_create_structures()
552 	fw_dev->fwif_sysinit =  in pvr_fw_create_structures()
554 						    fw_dev->fw_heap_info.config_offset +  in pvr_fw_create_structures()
556 						    sizeof(*fw_dev->fwif_sysinit),  in pvr_fw_create_structures()
559 	if (IS_ERR(fw_dev->fwif_sysinit)) {  in pvr_fw_create_structures()
561 		err = PTR_ERR(fw_dev->fwif_sysinit);  in pvr_fw_create_structures()
603 	struct pvr_fw_device *fw_dev = &pvr_dev->fw_dev;  in pvr_fw_destroy_structures()  local
604 	struct pvr_fw_mem *fw_mem = &fw_dev->mem;  in pvr_fw_destroy_structures()
634 	struct pvr_fw_mem *fw_mem = &pvr_dev->fw_dev.mem;  in pvr_fw_process()
635 	const u8 *fw = pvr_dev->fw_dev.firmware->data;  in pvr_fw_process()
666 	if (pvr_dev->fw_dev.defs->has_fixed_data_addr) {  in pvr_fw_process()
667 		u32 base_addr = private_data->base_addr & pvr_dev->fw_dev.fw_heap_info.offset_mask;  in pvr_fw_process()
730 	err = pvr_dev->fw_dev.defs->fw_process(pvr_dev, fw,  in pvr_fw_process()
812 	struct pvr_fw_mem *fw_mem = &pvr_dev->fw_dev.mem;  in pvr_fw_reinit_code_data()
843 	struct pvr_fw_mem *fw_mem = &pvr_dev->fw_dev.mem;  in pvr_fw_cleanup()
872 	struct pvr_fw_device *fw_dev = &pvr_dev->fw_dev;  in pvr_wait_for_fw_boot()  local
875 		if (READ_ONCE(fw_dev->fwif_sysinit->firmware_started))  in pvr_wait_for_fw_boot()
891 	struct pvr_fw_device *fw_dev = &pvr_dev->fw_dev;  in pvr_fw_heap_info_init()  local
893 	fw_dev->fw_heap_info.gpu_addr = PVR_ROGUE_FW_MAIN_HEAP_BASE;  in pvr_fw_heap_info_init()
894 	fw_dev->fw_heap_info.log2_size = log2_size;  in pvr_fw_heap_info_init()
895 	fw_dev->fw_heap_info.reserved_size = reserved_size;  in pvr_fw_heap_info_init()
896 	fw_dev->fw_heap_info.raw_size = 1 << fw_dev->fw_heap_info.log2_size;  in pvr_fw_heap_info_init()
897 	fw_dev->fw_heap_info.offset_mask = fw_dev->fw_heap_info.raw_size - 1;  in pvr_fw_heap_info_init()
898 	fw_dev->fw_heap_info.config_offset = fw_dev->fw_heap_info.raw_size -  in pvr_fw_heap_info_init()
900 	fw_dev->fw_heap_info.size = fw_dev->fw_heap_info.raw_size -  in pvr_fw_heap_info_init()
950 	struct pvr_fw_device *fw_dev = &pvr_dev->fw_dev;  in pvr_fw_init()  local
953 	if (fw_dev->processor_type >= PVR_FW_PROCESSOR_TYPE_COUNT)  in pvr_fw_init()
956 	fw_dev->defs = fw_defs[fw_dev->processor_type];  in pvr_fw_init()
958 	err = fw_dev->defs->init(pvr_dev);  in pvr_fw_init()
962 	drm_mm_init(&fw_dev->fw_mm, ROGUE_FW_HEAP_BASE, fw_dev->fw_heap_info.raw_size);  in pvr_fw_init()
963 	fw_dev->fw_mm_base = ROGUE_FW_HEAP_BASE;  in pvr_fw_init()
964 	spin_lock_init(&fw_dev->fw_mm_lock);  in pvr_fw_init()
966 	INIT_LIST_HEAD(&fw_dev->fw_objs.list);  in pvr_fw_init()
967 	err = drmm_mutex_init(from_pvr_device(pvr_dev), &fw_dev->fw_objs.lock);  in pvr_fw_init()
1007 	fw_dev->booted = true;  in pvr_fw_init()
1030 	drm_mm_takedown(&fw_dev->fw_mm);  in pvr_fw_init()
1032 	if (fw_dev->defs->fini)  in pvr_fw_init()
1033 		fw_dev->defs->fini(pvr_dev);  in pvr_fw_init()
1045 	struct pvr_fw_device *fw_dev = &pvr_dev->fw_dev;  in pvr_fw_fini()  local
1047 	fw_dev->booted = false;  in pvr_fw_fini()
1060 	mutex_lock(&pvr_dev->fw_dev.fw_objs.lock);  in pvr_fw_fini()
1061 	WARN_ON(!list_empty(&pvr_dev->fw_dev.fw_objs.list));  in pvr_fw_fini()
1062 	mutex_unlock(&pvr_dev->fw_dev.fw_objs.lock);  in pvr_fw_fini()
1064 	drm_mm_takedown(&fw_dev->fw_mm);  in pvr_fw_fini()
1066 	if (fw_dev->defs->fini)  in pvr_fw_fini()
1067 		fw_dev->defs->fini(pvr_dev);  in pvr_fw_fini()
1178 	struct pvr_fw_device *fw_dev = &pvr_dev->fw_dev;  in pvr_fw_object_fw_map()  local
1182 	spin_lock(&fw_dev->fw_mm_lock);  in pvr_fw_object_fw_map()
1194 		err = drm_mm_insert_node_in_range(&fw_dev->fw_mm, &fw_obj->fw_mm_node,  in pvr_fw_object_fw_map()
1196 						  fw_dev->fw_heap_info.gpu_addr,  in pvr_fw_object_fw_map()
1197 						  fw_dev->fw_heap_info.gpu_addr +  in pvr_fw_object_fw_map()
1198 						  fw_dev->fw_heap_info.size, 0);  in pvr_fw_object_fw_map()
1204 		err = drm_mm_reserve_node(&fw_dev->fw_mm, &fw_obj->fw_mm_node);  in pvr_fw_object_fw_map()
1209 	spin_unlock(&fw_dev->fw_mm_lock);  in pvr_fw_object_fw_map()
1212 	err = fw_dev->defs->vm_map(pvr_dev, fw_obj);  in pvr_fw_object_fw_map()
1216 	fw_obj->fw_addr_offset = (u32)(fw_obj->fw_mm_node.start - fw_dev->fw_mm_base);  in pvr_fw_object_fw_map()
1221 	spin_lock(&fw_dev->fw_mm_lock);  in pvr_fw_object_fw_map()
1225 	spin_unlock(&fw_dev->fw_mm_lock);  in pvr_fw_object_fw_map()
1244 	struct pvr_fw_device *fw_dev = &pvr_dev->fw_dev;  in pvr_fw_object_fw_unmap()  local
1246 	fw_dev->defs->vm_unmap(pvr_dev, fw_obj);  in pvr_fw_object_fw_unmap()
1248 	spin_lock(&fw_dev->fw_mm_lock);  in pvr_fw_object_fw_unmap()
1251 		spin_unlock(&fw_dev->fw_mm_lock);  in pvr_fw_object_fw_unmap()
1257 	spin_unlock(&fw_dev->fw_mm_lock);  in pvr_fw_object_fw_unmap()
1305 	mutex_lock(&pvr_dev->fw_dev.fw_objs.lock);  in pvr_fw_object_create_and_map_common()
1306 	list_add_tail(&fw_obj->node, &pvr_dev->fw_dev.fw_objs.list);  in pvr_fw_object_create_and_map_common()
1307 	mutex_unlock(&pvr_dev->fw_dev.fw_objs.lock);  in pvr_fw_object_create_and_map_common()
1416 	u64 dev_addr = pvr_dev->fw_dev.fw_mm_base + dev_offset;  in pvr_fw_object_create_and_map_offset()
1432 	mutex_lock(&pvr_dev->fw_dev.fw_objs.lock);  in pvr_fw_object_destroy()
1434 	mutex_unlock(&pvr_dev->fw_dev.fw_objs.lock);  in pvr_fw_object_destroy()
1460 	*fw_addr_out = pvr_dev->fw_dev.defs->get_fw_addr_with_offset(fw_obj, offset);  in pvr_fw_object_get_fw_addr_offset()
1467 	struct pvr_fw_device *fw_dev = &pvr_dev->fw_dev;  in pvr_fw_obj_get_gpu_addr()  local
1469 	return fw_dev->fw_heap_info.gpu_addr + fw_obj->fw_addr_offset;  in pvr_fw_obj_get_gpu_addr()
1490 	mutex_lock(&pvr_dev->fw_dev.fw_objs.lock);  in pvr_fw_hard_reset()
1492 	list_for_each(pos, &pvr_dev->fw_dev.fw_objs.list) {  in pvr_fw_hard_reset()
1508 	mutex_unlock(&pvr_dev->fw_dev.fw_objs.lock);  in pvr_fw_hard_reset()