Lines Matching refs:REG32
582 #define REG32(_reg, ...) \ macro
623 REG32(GEN7_3DPRIM_END_OFFSET),
624 REG32(GEN7_3DPRIM_START_VERTEX),
625 REG32(GEN7_3DPRIM_VERTEX_COUNT),
626 REG32(GEN7_3DPRIM_INSTANCE_COUNT),
627 REG32(GEN7_3DPRIM_START_INSTANCE),
628 REG32(GEN7_3DPRIM_BASE_VERTEX),
629 REG32(GEN7_GPGPU_DISPATCHDIMX),
630 REG32(GEN7_GPGPU_DISPATCHDIMY),
631 REG32(GEN7_GPGPU_DISPATCHDIMZ),
641 REG32(GEN7_SO_WRITE_OFFSET(0)),
642 REG32(GEN7_SO_WRITE_OFFSET(1)),
643 REG32(GEN7_SO_WRITE_OFFSET(2)),
644 REG32(GEN7_SO_WRITE_OFFSET(3)),
645 REG32(GEN7_L3SQCREG1),
646 REG32(GEN7_L3CNTLREG2),
647 REG32(GEN7_L3CNTLREG3),
668 REG32(HSW_SCRATCH1,
671 REG32(HSW_ROW_CHICKEN3,
680 REG32(BCS_SWCTRL),
687 REG32(BCS_SWCTRL),
709 #undef REG32