i915/gt/gen8_engine_cs.c

16 	u32 *cs, flags = 0;
19 	flags |= PIPE_CONTROL_CS_STALL;
22 		flags |= PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH;
23 		flags |= PIPE_CONTROL_DEPTH_CACHE_FLUSH;
24 		flags |= PIPE_CONTROL_DC_FLUSH_ENABLE;
25 		flags |= PIPE_CONTROL_FLUSH_ENABLE;
29 		flags |= PIPE_CONTROL_TLB_INVALIDATE;
30 		flags |= PIPE_CONTROL_INSTRUCTION_CACHE_INVALIDATE;
31 		flags |= PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE;
32 		flags |= PIPE_CONTROL_VF_CACHE_INVALIDATE;
33 		flags |= PIPE_CONTROL_CONST_CACHE_INVALIDATE;
34 		flags |= PIPE_CONTROL_STATE_CACHE_INVALIDATE;
35 		flags |= PIPE_CONTROL_QW_WRITE;
36 		flags |= PIPE_CONTROL_STORE_DATA_INDEX;
69 	cs = gen8_emit_pipe_control(cs, flags, LRC_PPHWSP_SCRATCH_ADDR);
116 		u32 flags = 0;
118 		flags |= PIPE_CONTROL_CS_STALL;
120 		flags |= PIPE_CONTROL_TILE_CACHE_FLUSH;
121 		flags |= PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH;
122 		flags |= PIPE_CONTROL_DEPTH_CACHE_FLUSH;
123 		flags |= PIPE_CONTROL_DC_FLUSH_ENABLE;
124 		flags |= PIPE_CONTROL_FLUSH_ENABLE;
125 		flags |= PIPE_CONTROL_QW_WRITE;
126 		flags |= PIPE_CONTROL_STORE_DATA_INDEX;
132 		cs = gen8_emit_pipe_control(cs, flags, LRC_PPHWSP_SCRATCH_ADDR);
138 		u32 flags = 0;
140 		flags |= PIPE_CONTROL_CS_STALL;
142 		flags |= PIPE_CONTROL_COMMAND_CACHE_INVALIDATE;
143 		flags |= PIPE_CONTROL_TLB_INVALIDATE;
144 		flags |= PIPE_CONTROL_INSTRUCTION_CACHE_INVALIDATE;
145 		flags |= PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE;
146 		flags |= PIPE_CONTROL_VF_CACHE_INVALIDATE;
147 		flags |= PIPE_CONTROL_CONST_CACHE_INVALIDATE;
148 		flags |= PIPE_CONTROL_STATE_CACHE_INVALIDATE;
149 		flags |= PIPE_CONTROL_QW_WRITE;
150 		flags |= PIPE_CONTROL_STORE_DATA_INDEX;
156 		cs = gen8_emit_pipe_control(cs, flags, LRC_PPHWSP_SCRATCH_ADDR);
310 		u32 flags = 0;
318 		flags |= PIPE_CONTROL_COMMAND_CACHE_INVALIDATE;
319 		flags |= PIPE_CONTROL_TLB_INVALIDATE;
320 		flags |= PIPE_CONTROL_INSTRUCTION_CACHE_INVALIDATE;
321 		flags |= PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE;
322 		flags |= PIPE_CONTROL_VF_CACHE_INVALIDATE;
323 		flags |= PIPE_CONTROL_CONST_CACHE_INVALIDATE;
324 		flags |= PIPE_CONTROL_STATE_CACHE_INVALIDATE;
326 		flags |= PIPE_CONTROL_STORE_DATA_INDEX;
327 		flags |= PIPE_CONTROL_QW_WRITE;
329 		flags |= PIPE_CONTROL_CS_STALL;
332 			flags &= ~PIPE_CONTROL_3D_ARCH_FLAGS;
334 			flags &= ~PIPE_CONTROL_3D_ENGINE_FLAGS;
351 		cs = gen8_emit_pipe_control(cs, flags, LRC_PPHWSP_SCRATCH_ADDR);
476 	__set_bit(I915_FENCE_FLAG_INITIAL_BREADCRUMB, &rq->fence.flags);
483 				const unsigned int flags,
506 		(flags & I915_DISPATCH_SECURE ? 0 : BIT(8));
524 			     const unsigned int flags)
526 	return __xehp_emit_bb_start(rq, offset, len, flags, MI_ARB_DISABLE);
531 		       const unsigned int flags)
533 	return __xehp_emit_bb_start(rq, offset, len, flags, MI_ARB_ENABLE);
538 			     const unsigned int flags)
563 		(flags & I915_DISPATCH_SECURE ? 0 : BIT(8));
574 		       const unsigned int flags)
579 		return gen8_emit_bb_start_noarb(rq, offset, len, flags);
588 		(flags & I915_DISPATCH_SECURE ? 0 : BIT(8));
816 	u32 flags = (PIPE_CONTROL_CS_STALL |
825 		flags |= PIPE_CONTROL_FLUSH_L3;
835 		flags |= PIPE_CONTROL_DEPTH_STALL;
838 		flags &= ~PIPE_CONTROL_3D_ARCH_FLAGS;
840 		flags &= ~PIPE_CONTROL_3D_ENGINE_FLAGS;
842 	cs = gen12_emit_pipe_control(cs, PIPE_CONTROL0_HDC_PIPELINE_FLUSH, flags, 0);