Lines Matching refs:intel_de_write
320 intel_de_write(display, TRANS_VRR_VMIN(display, cpu_transcoder), in intel_vrr_set_fixed_rr_timings()
322 intel_de_write(display, TRANS_VRR_VMAX(display, cpu_transcoder), in intel_vrr_set_fixed_rr_timings()
324 intel_de_write(display, TRANS_VRR_FLIPLINE(display, cpu_transcoder), in intel_vrr_set_fixed_rr_timings()
622 intel_de_write(display, in intel_vrr_set_transcoder_timings()
628 intel_de_write(display, TRANS_CMRR_M_HI(display, cpu_transcoder), in intel_vrr_set_transcoder_timings()
630 intel_de_write(display, TRANS_CMRR_M_LO(display, cpu_transcoder), in intel_vrr_set_transcoder_timings()
632 intel_de_write(display, TRANS_CMRR_N_HI(display, cpu_transcoder), in intel_vrr_set_transcoder_timings()
634 intel_de_write(display, TRANS_CMRR_N_LO(display, cpu_transcoder), in intel_vrr_set_transcoder_timings()
641 intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder), in intel_vrr_set_transcoder_timings()
645 intel_de_write(display, in intel_vrr_set_transcoder_timings()
658 intel_de_write(display, in intel_vrr_set_transcoder_timings()
673 intel_de_write(display, PIPEDMC_DCB_FLIP_COUNT(pipe), in intel_vrr_dcb_increment_flip_count()
687 intel_de_write(display, PIPEDMC_DCB_FLIP_COUNT(pipe), 0); in intel_vrr_dcb_reset()
688 intel_de_write(display, PIPEDMC_DCB_BALANCE_RESET(pipe), 0); in intel_vrr_dcb_reset()
790 intel_de_write(display, TRANS_VRR_VMIN(display, cpu_transcoder), in intel_vrr_set_vrr_timings()
792 intel_de_write(display, TRANS_VRR_VMAX(display, cpu_transcoder), in intel_vrr_set_vrr_timings()
794 intel_de_write(display, TRANS_VRR_FLIPLINE(display, cpu_transcoder), in intel_vrr_set_vrr_timings()
810 intel_de_write(display, TRANS_VRR_DCB_ADJ_VMAX_CFG(cpu_transcoder), in intel_vrr_enable_dc_balancing()
812 intel_de_write(display, TRANS_VRR_DCB_ADJ_VMAX_CFG_LIVE(cpu_transcoder), in intel_vrr_enable_dc_balancing()
814 intel_de_write(display, TRANS_VRR_DCB_VMAX(cpu_transcoder), in intel_vrr_enable_dc_balancing()
816 intel_de_write(display, TRANS_VRR_DCB_VMAX_LIVE(cpu_transcoder), in intel_vrr_enable_dc_balancing()
818 intel_de_write(display, TRANS_VRR_DCB_FLIPLINE(cpu_transcoder), in intel_vrr_enable_dc_balancing()
820 intel_de_write(display, TRANS_VRR_DCB_FLIPLINE_LIVE(cpu_transcoder), in intel_vrr_enable_dc_balancing()
822 intel_de_write(display, TRANS_VRR_DCB_ADJ_FLIPLINE_CFG_LIVE(cpu_transcoder), in intel_vrr_enable_dc_balancing()
824 intel_de_write(display, TRANS_VRR_DCB_ADJ_FLIPLINE_CFG(cpu_transcoder), in intel_vrr_enable_dc_balancing()
826 intel_de_write(display, PIPEDMC_DCB_VMIN(pipe), in intel_vrr_enable_dc_balancing()
828 intel_de_write(display, PIPEDMC_DCB_VMAX(pipe), in intel_vrr_enable_dc_balancing()
830 intel_de_write(display, PIPEDMC_DCB_MAX_INCREASE(pipe), in intel_vrr_enable_dc_balancing()
832 intel_de_write(display, PIPEDMC_DCB_MAX_DECREASE(pipe), in intel_vrr_enable_dc_balancing()
834 intel_de_write(display, PIPEDMC_DCB_GUARDBAND(pipe), in intel_vrr_enable_dc_balancing()
836 intel_de_write(display, PIPEDMC_DCB_SLOPE(pipe), in intel_vrr_enable_dc_balancing()
838 intel_de_write(display, PIPEDMC_DCB_VBLANK(pipe), in intel_vrr_enable_dc_balancing()
841 intel_de_write(display, TRANS_ADAPTIVE_SYNC_DCB_CTL(cpu_transcoder), in intel_vrr_enable_dc_balancing()
846 intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder), vrr_ctl); in intel_vrr_enable_dc_balancing()
863 intel_de_write(display, TRANS_ADAPTIVE_SYNC_DCB_CTL(cpu_transcoder), 0); in intel_vrr_disable_dc_balancing()
864 intel_de_write(display, PIPEDMC_DCB_VMIN(pipe), 0); in intel_vrr_disable_dc_balancing()
865 intel_de_write(display, PIPEDMC_DCB_VMAX(pipe), 0); in intel_vrr_disable_dc_balancing()
866 intel_de_write(display, PIPEDMC_DCB_MAX_INCREASE(pipe), 0); in intel_vrr_disable_dc_balancing()
867 intel_de_write(display, PIPEDMC_DCB_MAX_DECREASE(pipe), 0); in intel_vrr_disable_dc_balancing()
868 intel_de_write(display, PIPEDMC_DCB_GUARDBAND(pipe), 0); in intel_vrr_disable_dc_balancing()
869 intel_de_write(display, PIPEDMC_DCB_SLOPE(pipe), 0); in intel_vrr_disable_dc_balancing()
870 intel_de_write(display, PIPEDMC_DCB_VBLANK(pipe), 0); in intel_vrr_disable_dc_balancing()
871 intel_de_write(display, TRANS_VRR_DCB_ADJ_VMAX_CFG_LIVE(cpu_transcoder), 0); in intel_vrr_disable_dc_balancing()
872 intel_de_write(display, TRANS_VRR_DCB_ADJ_FLIPLINE_CFG_LIVE(cpu_transcoder), 0); in intel_vrr_disable_dc_balancing()
873 intel_de_write(display, TRANS_VRR_DCB_VMAX_LIVE(cpu_transcoder), 0); in intel_vrr_disable_dc_balancing()
874 intel_de_write(display, TRANS_VRR_DCB_FLIPLINE_LIVE(cpu_transcoder), 0); in intel_vrr_disable_dc_balancing()
875 intel_de_write(display, TRANS_VRR_DCB_ADJ_VMAX_CFG(cpu_transcoder), 0); in intel_vrr_disable_dc_balancing()
876 intel_de_write(display, TRANS_VRR_DCB_ADJ_FLIPLINE_CFG(cpu_transcoder), 0); in intel_vrr_disable_dc_balancing()
877 intel_de_write(display, TRANS_VRR_DCB_VMAX(cpu_transcoder), 0); in intel_vrr_disable_dc_balancing()
878 intel_de_write(display, TRANS_VRR_DCB_FLIPLINE(cpu_transcoder), 0); in intel_vrr_disable_dc_balancing()
881 intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder), vrr_ctl); in intel_vrr_disable_dc_balancing()
891 intel_de_write(display, TRANS_PUSH(display, cpu_transcoder), TRANS_PUSH_EN); in intel_vrr_tg_enable()
903 intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder), vrr_ctl); in intel_vrr_tg_enable()
911 intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder), in intel_vrr_tg_disable()
919 intel_de_write(display, TRANS_PUSH(display, cpu_transcoder), 0); in intel_vrr_tg_disable()