i915/display/intel_sdvo.c

123 	 * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd
751 				  struct intel_sdvo_dtd *dtd)
753 	return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
754 		intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
758 				  struct intel_sdvo_dtd *dtd)
760 	return intel_sdvo_get_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
761 		intel_sdvo_get_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
765 					struct intel_sdvo_dtd *dtd)
768 				     SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
772 					 struct intel_sdvo_dtd *dtd)
775 				     SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
779 					struct intel_sdvo_dtd *dtd)
782 				     SDVO_CMD_GET_INPUT_TIMINGS_PART1, dtd);
813 						  struct intel_sdvo_dtd *dtd)
815 	BUILD_BUG_ON(sizeof(dtd->part1) != 8);
816 	BUILD_BUG_ON(sizeof(dtd->part2) != 8);
818 				    &dtd->part1, sizeof(dtd->part1)) &&
820 				     &dtd->part2, sizeof(dtd->part2));
828 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
836 	memset(dtd, 0, sizeof(*dtd));
853 	dtd->part1.clock = mode_clock;
855 	dtd->part1.h_active = width & 0xff;
856 	dtd->part1.h_blank = h_blank_len & 0xff;
857 	dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
859 	dtd->part1.v_active = height & 0xff;
860 	dtd->part1.v_blank = v_blank_len & 0xff;
861 	dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
864 	dtd->part2.h_sync_off = h_sync_offset & 0xff;
865 	dtd->part2.h_sync_width = h_sync_len & 0xff;
866 	dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
868 	dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
872 	dtd->part2.dtd_flags = 0x18;
874 		dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE;
876 		dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE;
878 		dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE;
880 	dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
884 					 const struct intel_sdvo_dtd *dtd)
888 	mode.hdisplay = dtd->part1.h_active;
889 	mode.hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
890 	mode.hsync_start = mode.hdisplay + dtd->part2.h_sync_off;
891 	mode.hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
892 	mode.hsync_end = mode.hsync_start + dtd->part2.h_sync_width;
893 	mode.hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
894 	mode.htotal = mode.hdisplay + dtd->part1.h_blank;
895 	mode.htotal += (dtd->part1.h_high & 0xf) << 8;
897 	mode.vdisplay = dtd->part1.v_active;
898 	mode.vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
900 	mode.vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
901 	mode.vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
902 	mode.vsync_start += dtd->part2.v_sync_off_high & 0xc0;
904 		(dtd->part2.v_sync_off_width & 0xf);
905 	mode.vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
906 	mode.vtotal = mode.vdisplay + dtd->part1.v_blank;
907 	mode.vtotal += (dtd->part1.v_high & 0xf) << 8;
909 	mode.clock = dtd->part1.clock * 10;
911 	if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE)
913 	if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
917 	if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
1705 	struct intel_sdvo_dtd dtd;
1716 	ret = intel_sdvo_get_input_timing(intel_sdvo, &dtd);
1725 		if (dtd.part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
1730 		if (dtd.part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)