i915/display/intel_fbc.c

453 	u32 dpfc_ctl;
455 	dpfc_ctl = g4x_dpfc_ctl_limit(fbc) |
459 		dpfc_ctl |= DPFC_CTL_SR_EN;
462 		dpfc_ctl |= DPFC_CTL_FENCE_EN_G4X;
465 			dpfc_ctl |= DPFC_CTL_FENCENO(fbc_state->fence_id);
468 	return dpfc_ctl;
486 	u32 dpfc_ctl;
489 	dpfc_ctl = intel_de_read(display, DPFC_CONTROL);
490 	if (dpfc_ctl & DPFC_CTL_EN) {
491 		dpfc_ctl &= ~DPFC_CTL_EN;
492 		intel_de_write(display, DPFC_CONTROL, dpfc_ctl);
552 	u32 dpfc_ctl;
558 	dpfc_ctl = intel_de_read(display, ILK_DPFC_CONTROL(fbc->id));
559 	if (dpfc_ctl & DPFC_CTL_EN) {
560 		dpfc_ctl &= ~DPFC_CTL_EN;
561 		intel_de_write(display, ILK_DPFC_CONTROL(fbc->id), dpfc_ctl);
662 	u32 dpfc_ctl;
664 	dpfc_ctl = g4x_dpfc_ctl_limit(fbc);
667 		dpfc_ctl |= DPFC_CTL_PLANE_IVB(fbc_state->plane->i9xx_plane);
670 		dpfc_ctl |= DPFC_CTL_PLANE_BINDING(fbc_state->plane->id);
673 		dpfc_ctl |= DPFC_CTL_FENCE_EN_IVB;
676 		dpfc_ctl |= DPFC_CTL_FALSE_COLOR;
678 	return dpfc_ctl;
684 	u32 dpfc_ctl;
695 	dpfc_ctl = ivb_dpfc_ctl(fbc);
697 		intel_de_write(display, ILK_DPFC_CONTROL(fbc->id), dpfc_ctl);
704 		       DPFC_CTL_EN | dpfc_ctl);