38 	} dot, vco, n, m, m1, m2, p, p1;  member
50 	.m1 = { .min = 18, .max = 26 },
63 	.m1 = { .min = 18, .max = 26 },
76 	.m1 = { .min = 18, .max = 26 },
89 	.m1 = { .min = 8, .max = 18 },
102 	.m1 = { .min = 8, .max = 18 },
116 	.m1 = { .min = 17, .max = 23 },
131 	.m1 = { .min = 16, .max = 23 },
144 	.m1 = { .min = 17, .max = 23 },
158 	.m1 = { .min = 17, .max = 23 },
174 	.m1 = { .min = 0, .max = 0 },
187 	.m1 = { .min = 0, .max = 0 },
205 	.m1 = { .min = 12, .max = 22 },
218 	.m1 = { .min = 12, .max = 22 },
231 	.m1 = { .min = 12, .max = 22 },
245 	.m1 = { .min = 12, .max = 22 },
258 	.m1 = { .min = 12, .max = 22 },
276 	.m1 = { .min = 2, .max = 3 },
292 	.m1 = { .min = 2, .max = 2 },
302 	.m1 = { .min = 2, .max = 2 },
333 	return 5 * (dpll->m1 + 2) + (dpll->m2 + 2);  in i9xx_dpll_compute_m()
351 	clock->m = clock->m1 * clock->m2;  in vlv_calc_dpll_params()
364 	clock->m = clock->m1 * clock->m2;  in chv_calc_dpll_params()
439 	clock.m1 = (fp & FP_M1_DIV_MASK) >> FP_M1_DIV_SHIFT;  in i9xx_crtc_clock_get()
534 	clock.m1 = REG_FIELD_GET(DPIO_M1_DIV_MASK, tmp);  in vlv_crtc_clock_get()
566 	clock.m1 = REG_FIELD_GET(DPIO_CHV_M1_DIV_MASK, pll_dw1) == DPIO_CHV_M1_DIV_BY_2 ? 2 : 0;  in chv_crtc_clock_get()
591 	if (clock->m1 < limit->m1.min || limit->m1.max < clock->m1)  in intel_pll_is_valid()
597 		if (clock->m1 <= clock->m2)  in intel_pll_is_valid()
668 	for (clock.m1 = limit->m1.min; clock.m1 <= limit->m1.max;  in i9xx_find_best_dpll()
669 	     clock.m1++) {  in i9xx_find_best_dpll()
672 			if (clock.m2 >= clock.m1)  in i9xx_find_best_dpll()
726 	for (clock.m1 = limit->m1.min; clock.m1 <= limit->m1.max;  in pnv_find_best_dpll()
727 	     clock.m1++) {  in pnv_find_best_dpll()
789 		for (clock.m1 = limit->m1.max;  in g4x_find_best_dpll()
790 		     clock.m1 >= limit->m1.min; clock.m1--) {  in g4x_find_best_dpll()
884 				for (clock.m1 = limit->m1.min; clock.m1 <= limit->m1.max; clock.m1++) {  in vlv_find_best_dpll()
888 								     refclk * clock.m1);  in vlv_find_best_dpll()
940 	clock.m1 = 2;  in chv_find_best_dpll()
951 						   refclk * clock.m1);  in chv_find_best_dpll()
953 			if (m2 > INT_MAX/clock.m1)  in chv_find_best_dpll()
989 	return dpll->n << 16 | dpll->m1 << 8 | dpll->m2;  in i9xx_dpll_compute_fp()
1931 	tmp = DPIO_M1_DIV(clock->m1) |  in vlv_prepare_pll()