582 			       const struct intel_limit *limit,  in intel_pll_is_valid()  argument
585 	if (clock->n < limit->n.min || limit->n.max < clock->n)  in intel_pll_is_valid()
587 	if (clock->p1 < limit->p1.min || limit->p1.max < clock->p1)  in intel_pll_is_valid()
589 	if (clock->m2 < limit->m2.min || limit->m2.max < clock->m2)  in intel_pll_is_valid()
591 	if (clock->m1 < limit->m1.min || limit->m1.max < clock->m1)  in intel_pll_is_valid()
602 		if (clock->p < limit->p.min || limit->p.max < clock->p)  in intel_pll_is_valid()
604 		if (clock->m < limit->m.min || limit->m.max < clock->m)  in intel_pll_is_valid()
608 	if (clock->vco < limit->vco.min || limit->vco.max < clock->vco)  in intel_pll_is_valid()
613 	if (clock->dot < limit->dot.min || limit->dot.max < clock->dot)  in intel_pll_is_valid()
620 i9xx_select_p2_div(const struct intel_limit *limit,  in i9xx_select_p2_div()  argument
633 			return limit->p2.p2_fast;  in i9xx_select_p2_div()
635 			return limit->p2.p2_slow;  in i9xx_select_p2_div()
637 		if (target < limit->p2.dot_limit)  in i9xx_select_p2_div()
638 			return limit->p2.p2_slow;  in i9xx_select_p2_div()
640 			return limit->p2.p2_fast;  in i9xx_select_p2_div()
654 i9xx_find_best_dpll(const struct intel_limit *limit,  in i9xx_find_best_dpll()  argument
666 	clock.p2 = i9xx_select_p2_div(limit, crtc_state, target);  in i9xx_find_best_dpll()
668 	for (clock.m1 = limit->m1.min; clock.m1 <= limit->m1.max;  in i9xx_find_best_dpll()
670 		for (clock.m2 = limit->m2.min;  in i9xx_find_best_dpll()
671 		     clock.m2 <= limit->m2.max; clock.m2++) {  in i9xx_find_best_dpll()
674 			for (clock.n = limit->n.min;  in i9xx_find_best_dpll()
675 			     clock.n <= limit->n.max; clock.n++) {  in i9xx_find_best_dpll()
676 				for (clock.p1 = limit->p1.min;  in i9xx_find_best_dpll()
677 					clock.p1 <= limit->p1.max; clock.p1++) {  in i9xx_find_best_dpll()
682 								limit,  in i9xx_find_best_dpll()
712 pnv_find_best_dpll(const struct intel_limit *limit,  in pnv_find_best_dpll()  argument
724 	clock.p2 = i9xx_select_p2_div(limit, crtc_state, target);  in pnv_find_best_dpll()
726 	for (clock.m1 = limit->m1.min; clock.m1 <= limit->m1.max;  in pnv_find_best_dpll()
728 		for (clock.m2 = limit->m2.min;  in pnv_find_best_dpll()
729 		     clock.m2 <= limit->m2.max; clock.m2++) {  in pnv_find_best_dpll()
730 			for (clock.n = limit->n.min;  in pnv_find_best_dpll()
731 			     clock.n <= limit->n.max; clock.n++) {  in pnv_find_best_dpll()
732 				for (clock.p1 = limit->p1.min;  in pnv_find_best_dpll()
733 					clock.p1 <= limit->p1.max; clock.p1++) {  in pnv_find_best_dpll()
738 								limit,  in pnv_find_best_dpll()
768 g4x_find_best_dpll(const struct intel_limit *limit,  in g4x_find_best_dpll()  argument
783 	clock.p2 = i9xx_select_p2_div(limit, crtc_state, target);  in g4x_find_best_dpll()
785 	max_n = limit->n.max;  in g4x_find_best_dpll()
787 	for (clock.n = limit->n.min; clock.n <= max_n; clock.n++) {  in g4x_find_best_dpll()
789 		for (clock.m1 = limit->m1.max;  in g4x_find_best_dpll()
790 		     clock.m1 >= limit->m1.min; clock.m1--) {  in g4x_find_best_dpll()
791 			for (clock.m2 = limit->m2.max;  in g4x_find_best_dpll()
792 			     clock.m2 >= limit->m2.min; clock.m2--) {  in g4x_find_best_dpll()
793 				for (clock.p1 = limit->p1.max;  in g4x_find_best_dpll()
794 				     clock.p1 >= limit->p1.min; clock.p1--) {  in g4x_find_best_dpll()
799 								limit,  in g4x_find_best_dpll()
862 vlv_find_best_dpll(const struct intel_limit *limit,  in vlv_find_best_dpll()  argument
872 	int max_n = min(limit->n.max, refclk / 19200);  in vlv_find_best_dpll()
878 	for (clock.n = limit->n.min; clock.n <= max_n; clock.n++) {  in vlv_find_best_dpll()
879 		for (clock.p1 = limit->p1.max; clock.p1 >= limit->p1.min; clock.p1--) {  in vlv_find_best_dpll()
880 			for (clock.p2 = limit->p2.p2_fast; clock.p2 >= limit->p2.p2_slow;  in vlv_find_best_dpll()
884 				for (clock.m1 = limit->m1.min; clock.m1 <= limit->m1.max; clock.m1++) {  in vlv_find_best_dpll()
893 								limit,  in vlv_find_best_dpll()
919 chv_find_best_dpll(const struct intel_limit *limit,  in chv_find_best_dpll()  argument
942 	for (clock.p1 = limit->p1.max; clock.p1 >= limit->p1.min; clock.p1--) {  in chv_find_best_dpll()
943 		for (clock.p2 = limit->p2.p2_fast;  in chv_find_best_dpll()
944 				clock.p2 >= limit->p2.p2_slow;  in chv_find_best_dpll()
960 			if (!intel_pll_is_valid(display, limit, &clock))  in chv_find_best_dpll()
979 	const struct intel_limit *limit = &intel_limits_bxt;  in bxt_find_best_dpll()  local
982 	return chv_find_best_dpll(limit, crtc_state,  in bxt_find_best_dpll()
1357 	const struct intel_limit *limit;  in ilk_crtc_compute_clock()  local
1375 				limit = &ilk_limits_dual_lvds_100m;  in ilk_crtc_compute_clock()
1377 				limit = &ilk_limits_dual_lvds;  in ilk_crtc_compute_clock()
1380 				limit = &ilk_limits_single_lvds_100m;  in ilk_crtc_compute_clock()
1382 				limit = &ilk_limits_single_lvds;  in ilk_crtc_compute_clock()
1385 		limit = &ilk_limits_dac;  in ilk_crtc_compute_clock()
1389 	    !g4x_find_best_dpll(limit, crtc_state, crtc_state->port_clock,  in ilk_crtc_compute_clock()
1478 	const struct intel_limit *limit = &intel_limits_chv;  in chv_crtc_compute_clock()  local
1482 	    !chv_find_best_dpll(limit, crtc_state, crtc_state->port_clock,  in chv_crtc_compute_clock()
1505 	const struct intel_limit *limit = &intel_limits_vlv;  in vlv_crtc_compute_clock()  local
1509 	    !vlv_find_best_dpll(limit, crtc_state, crtc_state->port_clock,  in vlv_crtc_compute_clock()
1533 	const struct intel_limit *limit;  in g4x_crtc_compute_clock()  local
1545 			limit = &intel_limits_g4x_dual_channel_lvds;  in g4x_crtc_compute_clock()
1547 			limit = &intel_limits_g4x_single_channel_lvds;  in g4x_crtc_compute_clock()
1550 		limit = &intel_limits_g4x_hdmi;  in g4x_crtc_compute_clock()
1552 		limit = &intel_limits_g4x_sdvo;  in g4x_crtc_compute_clock()
1555 		limit = &intel_limits_i9xx_sdvo;  in g4x_crtc_compute_clock()
1559 	    !g4x_find_best_dpll(limit, crtc_state, crtc_state->port_clock,  in g4x_crtc_compute_clock()
1582 	const struct intel_limit *limit;  in pnv_crtc_compute_clock()  local
1593 		limit = &pnv_limits_lvds;  in pnv_crtc_compute_clock()
1595 		limit = &pnv_limits_sdvo;  in pnv_crtc_compute_clock()
1599 	    !pnv_find_best_dpll(limit, crtc_state, crtc_state->port_clock,  in pnv_crtc_compute_clock()
1620 	const struct intel_limit *limit;  in i9xx_crtc_compute_clock()  local
1631 		limit = &intel_limits_i9xx_lvds;  in i9xx_crtc_compute_clock()
1633 		limit = &intel_limits_i9xx_sdvo;  in i9xx_crtc_compute_clock()
1637 	    !i9xx_find_best_dpll(limit, crtc_state, crtc_state->port_clock,  in i9xx_crtc_compute_clock()
1660 	const struct intel_limit *limit;  in i8xx_crtc_compute_clock()  local
1671 		limit = &intel_limits_i8xx_lvds;  in i8xx_crtc_compute_clock()
1673 		limit = &intel_limits_i8xx_dvo;  in i8xx_crtc_compute_clock()
1675 		limit = &intel_limits_i8xx_dac;  in i8xx_crtc_compute_clock()
1679 	    !i9xx_find_best_dpll(limit, crtc_state, crtc_state->port_clock,  in i8xx_crtc_compute_clock()