i915/display/intel_display_irq.c

138 	u32 new_val;
143 	new_val = dev_priv->irq_mask;
144 	new_val &= ~interrupt_mask;
145 	new_val |= (~enabled_irq_mask & interrupt_mask);
147 	if (new_val != dev_priv->irq_mask &&
149 		dev_priv->irq_mask = new_val;
175 	u32 new_val;
187 	new_val = old_val;
188 	new_val &= ~interrupt_mask;
189 	new_val |= (~enabled_irq_mask & interrupt_mask);
191 	if (new_val != old_val) {
192 		intel_de_write(display, GEN8_DE_PORT_IMR, new_val);
209 	u32 new_val;
218 	new_val = display->irq.de_irq_mask[pipe];
219 	new_val &= ~interrupt_mask;
220 	new_val |= (~enabled_irq_mask & interrupt_mask);
222 	if (new_val != display->irq.de_irq_mask[pipe]) {
223 		display->irq.de_irq_mask[pipe] = new_val;