154 	return intel_de_read(display, BLC_PWM_PCH_CTL2) & BACKLIGHT_DUTY_CYCLE_MASK;  in lpt_get_backlight()
161 	return intel_de_read(display, BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;  in pch_get_backlight()
170 	val = intel_de_read(display, BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;  in i9xx_get_backlight()
192 	return intel_de_read(display, VLV_BLC_PWM_CTL(pipe)) & BACKLIGHT_DUTY_CYCLE_MASK;  in vlv_get_backlight()
200 	return intel_de_read(display, BXT_BLC_PWM_DUTY(panel->backlight.controller));  in bxt_get_backlight()
218 	val = intel_de_read(display, BLC_PWM_PCH_CTL2) & ~BACKLIGHT_DUTY_CYCLE_MASK;  in lpt_set_backlight()
228 	tmp = intel_de_read(display, BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;  in pch_set_backlight()
258 	tmp = intel_de_read(display, BLC_PWM_CTL) & ~mask;  in i9xx_set_backlight()
269 	tmp = intel_de_read(display, VLV_BLC_PWM_CTL(pipe)) & ~BACKLIGHT_DUTY_CYCLE_MASK;  in vlv_set_backlight()
358 	tmp = intel_de_read(display, BLC_PWM_CPU_CTL2);  in lpt_disable_backlight()
483 	pch_ctl1 = intel_de_read(display, BLC_PWM_PCH_CTL1);  in lpt_enable_backlight()
529 	cpu_ctl2 = intel_de_read(display, BLC_PWM_CPU_CTL2);  in pch_enable_backlight()
538 	pch_ctl1 = intel_de_read(display, BLC_PWM_PCH_CTL1);  in pch_enable_backlight()
578 	ctl = intel_de_read(display, BLC_PWM_CTL);  in i9xx_enable_backlight()
620 	ctl2 = intel_de_read(display, BLC_PWM_CTL2);  in i965_enable_backlight()
657 	ctl2 = intel_de_read(display, VLV_BLC_PWM_CTL2(pipe));  in vlv_enable_backlight()
691 		val = intel_de_read(display, UTIL_PIN_CTL);  in bxt_enable_backlight()
707 	pwm_ctl = intel_de_read(display, BXT_BLC_PWM_CTL(panel->backlight.controller));  in bxt_enable_backlight()
740 	pwm_ctl = intel_de_read(display, BXT_BLC_PWM_CTL(panel->backlight.controller));  in cnp_enable_backlight()
1148 	if ((intel_de_read(display, CBR1_VLV) & CBR_PWM_CLOCK_MUX_SELECT) == 0) {  in vlv_hz_to_pwm()
1241 		alt = intel_de_read(display, SOUTH_CHICKEN2) & LPT_PWM_GRANULARITY;  in lpt_setup_backlight()
1243 		alt = intel_de_read(display, SOUTH_CHICKEN1) & SPT_PWM_GRANULARITY;  in lpt_setup_backlight()
1246 	pch_ctl1 = intel_de_read(display, BLC_PWM_PCH_CTL1);  in lpt_setup_backlight()
1249 	pch_ctl2 = intel_de_read(display, BLC_PWM_PCH_CTL2);  in lpt_setup_backlight()
1252 	cpu_ctl2 = intel_de_read(display, BLC_PWM_CPU_CTL2);  in lpt_setup_backlight()
1296 	pch_ctl1 = intel_de_read(display, BLC_PWM_PCH_CTL1);  in pch_setup_backlight()
1299 	pch_ctl2 = intel_de_read(display, BLC_PWM_PCH_CTL2);  in pch_setup_backlight()
1310 	cpu_ctl2 = intel_de_read(display, BLC_PWM_CPU_CTL2);  in pch_setup_backlight()
1327 	ctl = intel_de_read(display, BLC_PWM_CTL);  in i9xx_setup_backlight()
1369 	ctl2 = intel_de_read(display, BLC_PWM_CTL2);  in i965_setup_backlight()
1373 	ctl = intel_de_read(display, BLC_PWM_CTL);  in i965_setup_backlight()
1405 	ctl2 = intel_de_read(display, VLV_BLC_PWM_CTL2(pipe));  in vlv_setup_backlight()
1408 	ctl = intel_de_read(display, VLV_BLC_PWM_CTL(pipe));  in vlv_setup_backlight()
1437 	pwm_ctl = intel_de_read(display,  in bxt_setup_backlight()
1442 		val = intel_de_read(display, UTIL_PIN_CTL);  in bxt_setup_backlight()
1449 		intel_de_read(display, BXT_BLC_PWM_FREQ(panel->backlight.controller));  in bxt_setup_backlight()
1491 		return intel_de_read(display, SOUTH_CHICKEN1) & ICP_SECOND_PPS_IO_SELECT;  in cnp_backlight_controller_is_valid()
1516 	pwm_ctl = intel_de_read(display,  in cnp_setup_backlight()
1521 		intel_de_read(display, BXT_BLC_PWM_FREQ(panel->backlight.controller));  in cnp_setup_backlight()