i915/display/i9xx_plane.c

164 	u32 dspcntr;
166 	dspcntr = DISP_ENABLE;
170 		dspcntr |= DISP_TRICKLE_FEED_DISABLE;
174 		dspcntr |= DISP_FORMAT_8BPP;
177 		dspcntr |= DISP_FORMAT_BGRX555;
180 		dspcntr |= DISP_FORMAT_BGRA555;
183 		dspcntr |= DISP_FORMAT_BGRX565;
186 		dspcntr |= DISP_FORMAT_BGRX888;
189 		dspcntr |= DISP_FORMAT_RGBX888;
192 		dspcntr |= DISP_FORMAT_BGRA888;
195 		dspcntr |= DISP_FORMAT_RGBA888;
198 		dspcntr |= DISP_FORMAT_BGRX101010;
201 		dspcntr |= DISP_FORMAT_RGBX101010;
204 		dspcntr |= DISP_FORMAT_BGRA101010;
207 		dspcntr |= DISP_FORMAT_RGBA101010;
210 		dspcntr |= DISP_FORMAT_RGBX161616;
219 		dspcntr |= DISP_TILED;
222 		dspcntr |= DISP_ROTATE_180;
225 		dspcntr |= DISP_MIRROR;
227 	return dspcntr;
367 	u32 dspcntr = 0;
370 		dspcntr |= DISP_PIPE_GAMMA_ENABLE;
373 		dspcntr |= DISP_PIPE_CSC_ENABLE;
376 		dspcntr |= DISP_PIPE_SEL(crtc->pipe);
378 	return dspcntr;
466 	u32 dspcntr, dspaddr_offset, linear_offset;
468 	dspcntr = plane_state->ctl | i9xx_plane_ctl_crtc(crtc_state);
473 		dspcntr |= DISP_ASYNC_FLIP;
511 	intel_de_write_fw(display, DSPCNTR(display, i9xx_plane), dspcntr);
542 	u32 dspcntr;
554 	dspcntr = i9xx_plane_ctl_crtc(crtc_state);
556 	intel_de_write_fw(display, DSPCNTR(display, i9xx_plane), dspcntr);
606 	u32 dspcntr = plane_state->ctl | i9xx_plane_ctl_crtc(crtc_state);
611 		dspcntr |= DISP_ASYNC_FLIP;
613 	intel_de_write_fw(display, DSPCNTR(display, i9xx_plane), dspcntr);
913 	u32 dspcntr;
916 	dspcntr = intel_de_read_fw(display, DSPCNTR(display, i9xx_plane));
917 	dspcntr &= ~DISP_TILED;
918 	intel_de_write_fw(display, DSPCNTR(display, i9xx_plane), dspcntr);