Lines Matching refs:phy_cfg

70 				   struct phy_configure_opts_lvds *phy_cfg)
72 	phy_cfg->bits_per_lane_and_dclk_cycle = 7;
73 	phy_cfg->lanes = 4;
74 	phy_cfg->differential_clk_rate = is_split ? di_clk / 2 : di_clk;
75 	phy_cfg->is_slave = is_slave;
92 	struct phy_configure_opts_lvds *phy_cfg = &opts.lvds;
100 	imx8qm_ldb_set_phy_cfg(imx8qm_ldb, di_clk, is_split, false, phy_cfg);
112 				       phy_cfg);
139 	struct phy_configure_opts_lvds *phy_cfg = &opts.lvds;
154 	imx8qm_ldb_set_phy_cfg(imx8qm_ldb, di_clk, is_split, false, phy_cfg);
163 				       phy_cfg);