bridge/analogix/analogix_dp_reg.c

524 		union phy_configure_opts phy_cfg = {0};
526 		phy_cfg.dp.link_rate =
528 		phy_cfg.dp.set_rate = true;
529 		ret = phy_configure(dp->phy, &phy_cfg);
554 		union phy_configure_opts phy_cfg = {0};
556 		phy_cfg.dp.lanes = dp->link_train.lane_count;
557 		phy_cfg.dp.set_lanes = true;
558 		ret = phy_configure(dp->phy, &phy_cfg);
584 		union phy_configure_opts phy_cfg = {0};
594 			phy_cfg.dp.voltage[lane] = vs;
595 			phy_cfg.dp.pre[lane] = pe;
598 		phy_cfg.dp.set_voltages = true;
599 		ret = phy_configure(dp->phy, &phy_cfg);