powerplay/smumgr/vega12_smumgr.c

37  * @param   hwmgr    the address of the HW manager
40 static int vega12_copy_table_from_smc(struct pp_hwmgr *hwmgr,
44 			(struct vega12_smumgr *)(hwmgr->smu_backend);
45 	struct amdgpu_device *adev = hwmgr->adev;
53 	PP_ASSERT_WITH_CODE(smum_send_msg_to_smc_with_parameter(hwmgr,
58 	PP_ASSERT_WITH_CODE(smum_send_msg_to_smc_with_parameter(hwmgr,
64 	PP_ASSERT_WITH_CODE(smum_send_msg_to_smc_with_parameter(hwmgr,
81  * @param   hwmgr    the address of the HW manager
84 static int vega12_copy_table_to_smc(struct pp_hwmgr *hwmgr,
88 			(struct vega12_smumgr *)(hwmgr->smu_backend);
89 	struct amdgpu_device *adev = hwmgr->adev;
103 	PP_ASSERT_WITH_CODE(smum_send_msg_to_smc_with_parameter(hwmgr,
109 	PP_ASSERT_WITH_CODE(smum_send_msg_to_smc_with_parameter(hwmgr,
115 	PP_ASSERT_WITH_CODE(smum_send_msg_to_smc_with_parameter(hwmgr,
125 int vega12_enable_smc_features(struct pp_hwmgr *hwmgr,
134 		PP_ASSERT_WITH_CODE(smum_send_msg_to_smc_with_parameter(hwmgr,
138 		PP_ASSERT_WITH_CODE(smum_send_msg_to_smc_with_parameter(hwmgr,
143 		PP_ASSERT_WITH_CODE(smum_send_msg_to_smc_with_parameter(hwmgr,
147 		PP_ASSERT_WITH_CODE(smum_send_msg_to_smc_with_parameter(hwmgr,
156 int vega12_get_enabled_smc_features(struct pp_hwmgr *hwmgr,
164 	PP_ASSERT_WITH_CODE(smum_send_msg_to_smc(hwmgr,
170 	PP_ASSERT_WITH_CODE(smum_send_msg_to_smc(hwmgr,
182 static bool vega12_is_dpm_running(struct pp_hwmgr *hwmgr)
186 	vega12_get_enabled_smc_features(hwmgr, &features_enabled);
194 static int vega12_set_tools_address(struct pp_hwmgr *hwmgr)
197 			(struct vega12_smumgr *)(hwmgr->smu_backend);
200 		if (!smum_send_msg_to_smc_with_parameter(hwmgr,
204 			smum_send_msg_to_smc_with_parameter(hwmgr,
212 static int vega12_smu_init(struct pp_hwmgr *hwmgr)
219 	ret = cgs_get_firmware_info(hwmgr->device, CGS_UCODE_ID_SMU,
228 	hwmgr->smu_backend = priv;
231 	ret = amdgpu_bo_create_kernel((struct amdgpu_device *)hwmgr->adev,
245 	ret = amdgpu_bo_create_kernel((struct amdgpu_device *)hwmgr->adev,
260 	ret = amdgpu_bo_create_kernel((struct amdgpu_device *)hwmgr->adev,
274 	ret = amdgpu_bo_create_kernel((struct amdgpu_device *)hwmgr->adev,
289 	ret = amdgpu_bo_create_kernel((struct amdgpu_device *)hwmgr->adev,
303 	ret = amdgpu_bo_create_kernel((struct amdgpu_device *)hwmgr->adev,
340 	kfree(hwmgr->smu_backend);
345 static int vega12_smu_fini(struct pp_hwmgr *hwmgr)
348 			(struct vega12_smumgr *)(hwmgr->smu_backend);
370 		kfree(hwmgr->smu_backend);
371 		hwmgr->smu_backend = NULL;
376 static int vega12_start_smu(struct pp_hwmgr *hwmgr)
378 	PP_ASSERT_WITH_CODE(smu9_is_smc_ram_running(hwmgr),
382 	vega12_set_tools_address(hwmgr);
387 static int vega12_smc_table_manager(struct pp_hwmgr *hwmgr, uint8_t *table,
393 		ret = vega12_copy_table_from_smc(hwmgr, table, table_id);
395 		ret = vega12_copy_table_to_smc(hwmgr, table, table_id);