Lines Matching defs:cu
1022 struct crat_subtype_computeunit *cu)
1024 dev->node_props.cpu_cores_count = cu->num_cpu_cores;
1025 dev->node_props.cpu_core_id_base = cu->processor_id_low;
1026 if (cu->hsa_capability & CRAT_CU_FLAGS_IOMMU_PRESENT)
1029 pr_debug("CU CPU: cores=%d id_base=%d\n", cu->num_cpu_cores,
1030 cu->processor_id_low);
1034 struct crat_subtype_computeunit *cu)
1036 dev->node_props.simd_id_base = cu->processor_id_low;
1037 dev->node_props.simd_count = cu->num_simd_cores;
1038 dev->node_props.lds_size_in_kb = cu->lds_size_in_kb;
1039 dev->node_props.max_waves_per_simd = cu->max_waves_simd;
1040 dev->node_props.wave_front_size = cu->wave_front_size;
1041 dev->node_props.array_count = cu->array_count;
1042 dev->node_props.cu_per_simd_array = cu->num_cu_per_array;
1043 dev->node_props.simd_per_cu = cu->num_simd_per_cu;
1044 dev->node_props.max_slots_scratch_cu = cu->max_slots_scatch_cu;
1045 if (cu->hsa_capability & CRAT_CU_FLAGS_HOT_PLUGGABLE)
1047 pr_debug("CU GPU: id_base=%d\n", cu->processor_id_low);
1053 static int kfd_parse_subtype_cu(struct crat_subtype_computeunit *cu,
1059 cu->proximity_domain, cu->hsa_capability);
1061 if (cu->proximity_domain == dev->proximity_domain) {
1062 if (cu->flags & CRAT_CU_FLAGS_CPU_PRESENT)
1063 kfd_populated_cu_info_cpu(dev, cu);
1065 if (cu->flags & CRAT_CU_FLAGS_GPU_PRESENT)
1066 kfd_populated_cu_info_gpu(dev, cu);
1310 struct crat_subtype_computeunit *cu;
1318 cu = (struct crat_subtype_computeunit *)sub_type_hdr;
1319 ret = kfd_parse_subtype_cu(cu, device_list);
2242 struct crat_subtype_computeunit *cu;
2276 cu = (struct crat_subtype_computeunit *)sub_type_hdr;
2277 cu->flags |= CRAT_CU_FLAGS_GPU_PRESENT;
2278 cu->proximity_domain = proximity_domain;
2280 cu->num_simd_per_cu = cu_info->simd_per_cu;
2281 cu->num_simd_cores = cu_info->simd_per_cu *
2283 cu->max_waves_simd = cu_info->max_waves_per_simd;
2285 cu->wave_front_size = cu_info->wave_front_size;
2286 cu->array_count = gfx_info->max_sh_per_se *
2288 total_num_of_cu = (cu->array_count * gfx_info->max_cu_per_sh);
2289 cu->processor_id_low = get_and_inc_gpu_processor_id(total_num_of_cu);
2290 cu->num_cu_per_array = gfx_info->max_cu_per_sh;
2291 cu->max_slots_scatch_cu = cu_info->max_scratch_slots_per_cu;
2292 cu->num_banks = gfx_info->max_shader_engines;
2293 cu->lds_size_in_kb = cu_info->lds_size;
2295 cu->hsa_capability = 0;