Lines Matching defs:var
35 var SQ_WAVE_STATE_PRIV_BARRIER_COMPLETE_MASK = 0x4
36 var SQ_WAVE_STATE_PRIV_SCC_SHIFT = 9
37 var SQ_WAVE_STATE_PRIV_SYS_PRIO_MASK = 0xC00
38 var SQ_WAVE_STATE_PRIV_HALT_MASK = 0x4000
39 var SQ_WAVE_STATE_PRIV_POISON_ERR_MASK = 0x8000
40 var SQ_WAVE_STATE_PRIV_POISON_ERR_SHIFT = 15
41 var SQ_WAVE_STATUS_WAVE64_SHIFT = 29
42 var SQ_WAVE_STATUS_WAVE64_SIZE = 1
43 var SQ_WAVE_STATUS_NO_VGPRS_SHIFT = 24
44 var SQ_WAVE_STATE_PRIV_ALWAYS_CLEAR_MASK = SQ_WAVE_STATE_PRIV_SYS_PRIO_MASK|SQ_WAVE_STATE_PRIV_POISON_ERR_MASK
45 var S_SAVE_PC_HI_TRAP_ID_MASK = 0xF0000000
47 var SQ_WAVE_LDS_ALLOC_LDS_SIZE_SHIFT = 12
48 var SQ_WAVE_LDS_ALLOC_LDS_SIZE_SIZE = 9
49 var SQ_WAVE_GPR_ALLOC_VGPR_SIZE_SIZE = 8
50 var SQ_WAVE_GPR_ALLOC_VGPR_SIZE_SHIFT = 12
51 var SQ_WAVE_LDS_ALLOC_VGPR_SHARED_SIZE_SHIFT = 24
52 var SQ_WAVE_LDS_ALLOC_VGPR_SHARED_SIZE_SIZE = 4
53 var SQ_WAVE_LDS_ALLOC_GRANULARITY = 9
55 var SQ_WAVE_EXCP_FLAG_PRIV_ADDR_WATCH_MASK = 0xF
56 var SQ_WAVE_EXCP_FLAG_PRIV_MEM_VIOL_MASK = 0x10
57 var SQ_WAVE_EXCP_FLAG_PRIV_SAVE_CONTEXT_SHIFT = 5
58 var SQ_WAVE_EXCP_FLAG_PRIV_SAVE_CONTEXT_MASK = 0x20
59 var SQ_WAVE_EXCP_FLAG_PRIV_ILLEGAL_INST_MASK = 0x40
60 var SQ_WAVE_EXCP_FLAG_PRIV_ILLEGAL_INST_SHIFT = 6
61 var SQ_WAVE_EXCP_FLAG_PRIV_HOST_TRAP_MASK = 0x80
62 var SQ_WAVE_EXCP_FLAG_PRIV_HOST_TRAP_SHIFT = 7
63 var SQ_WAVE_EXCP_FLAG_PRIV_WAVE_START_MASK = 0x100
64 var SQ_WAVE_EXCP_FLAG_PRIV_WAVE_START_SHIFT = 8
65 var SQ_WAVE_EXCP_FLAG_PRIV_WAVE_END_MASK = 0x200
66 var SQ_WAVE_EXCP_FLAG_PRIV_TRAP_AFTER_INST_MASK = 0x800
67 var SQ_WAVE_TRAP_CTRL_ADDR_WATCH_MASK = 0x80
68 var SQ_WAVE_TRAP_CTRL_TRAP_AFTER_INST_MASK = 0x200
70 var SQ_WAVE_EXCP_FLAG_PRIV_NON_MASKABLE_EXCP_MASK= SQ_WAVE_EXCP_FLAG_PRIV_MEM_VIOL_MASK |\
76 var SQ_WAVE_EXCP_FLAG_PRIV_RESTORE_PART_1_SIZE = SQ_WAVE_EXCP_FLAG_PRIV_SAVE_CONTEXT_SHIFT
77 var SQ_WAVE_EXCP_FLAG_PRIV_RESTORE_PART_2_SHIFT = SQ_WAVE_EXCP_FLAG_PRIV_ILLEGAL_INST_SHIFT
78 var SQ_WAVE_EXCP_FLAG_PRIV_RESTORE_PART_2_SIZE = SQ_WAVE_EXCP_FLAG_PRIV_HOST_TRAP_SHIFT - SQ_WAVE_EXCP_FLAG_PRIV_ILLEGAL_INST_SHIFT
79 var SQ_WAVE_EXCP_FLAG_PRIV_RESTORE_PART_3_SHIFT = SQ_WAVE_EXCP_FLAG_PRIV_WAVE_START_SHIFT
80 var SQ_WAVE_EXCP_FLAG_PRIV_RESTORE_PART_3_SIZE = 32 - SQ_WAVE_EXCP_FLAG_PRIV_RESTORE_PART_3_SHIFT
81 var BARRIER_STATE_SIGNAL_OFFSET = 16
82 var BARRIER_STATE_VALID_OFFSET = 0
84 var TTMP11_DEBUG_TRAP_ENABLED_SHIFT = 23
85 var TTMP11_DEBUG_TRAP_ENABLED_MASK = 0x800000
89 var S_SAVE_BUF_RSRC_WORD1_STRIDE = 0x00040000
90 var S_SAVE_BUF_RSRC_WORD3_MISC = 0x10807FAC
91 var S_SAVE_SPI_INIT_FIRST_WAVE_MASK = 0x04000000
92 var S_SAVE_SPI_INIT_FIRST_WAVE_SHIFT = 26
94 var S_SAVE_PC_HI_FIRST_WAVE_MASK = 0x80000000
95 var S_SAVE_PC_HI_FIRST_WAVE_SHIFT = 31
97 var s_sgpr_save_num = 108
99 var s_save_spi_init_lo = exec_lo
100 var s_save_spi_init_hi = exec_hi
101 var s_save_pc_lo = ttmp0
102 var s_save_pc_hi = ttmp1
103 var s_save_exec_lo = ttmp2
104 var s_save_exec_hi = ttmp3
105 var s_save_state_priv = ttmp12
106 var s_save_excp_flag_priv = ttmp15
107 var s_save_xnack_mask = s_save_excp_flag_priv
108 var s_wave_size = ttmp7
109 var s_save_buf_rsrc0 = ttmp8
110 var s_save_buf_rsrc1 = ttmp9
111 var s_save_buf_rsrc2 = ttmp10
112 var s_save_buf_rsrc3 = ttmp11
113 var s_save_mem_offset = ttmp4
114 var s_save_alloc_size = s_save_excp_flag_priv
115 var s_save_tmp = ttmp14
116 var s_save_m0 = ttmp5
117 var s_save_ttmps_lo = s_save_tmp
118 var s_save_ttmps_hi = s_save_excp_flag_priv
120 var S_RESTORE_BUF_RSRC_WORD1_STRIDE = S_SAVE_BUF_RSRC_WORD1_STRIDE
121 var S_RESTORE_BUF_RSRC_WORD3_MISC = S_SAVE_BUF_RSRC_WORD3_MISC
123 var S_RESTORE_SPI_INIT_FIRST_WAVE_MASK = 0x04000000
124 var S_RESTORE_SPI_INIT_FIRST_WAVE_SHIFT = 26
125 var S_WAVE_SIZE = 25
127 var s_restore_spi_init_lo = exec_lo
128 var s_restore_spi_init_hi = exec_hi
129 var s_restore_mem_offset = ttmp12
130 var s_restore_alloc_size = ttmp3
131 var s_restore_tmp = ttmp2
132 var s_restore_mem_offset_save = s_restore_tmp
133 var s_restore_m0 = s_restore_alloc_size
134 var s_restore_mode = ttmp7
135 var s_restore_flat_scratch = s_restore_tmp
136 var s_restore_pc_lo = ttmp0
137 var s_restore_pc_hi = ttmp1
138 var s_restore_exec_lo = ttmp4
139 var s_restore_exec_hi = ttmp5
140 var s_restore_state_priv = ttmp14
141 var s_restore_excp_flag_priv = ttmp15
142 var s_restore_xnack_mask = ttmp13
143 var s_restore_buf_rsrc0 = ttmp8
144 var s_restore_buf_rsrc1 = ttmp9
145 var s_restore_buf_rsrc2 = ttmp10
146 var s_restore_buf_rsrc3 = ttmp11
147 var s_restore_size = ttmp6
148 var s_restore_ttmps_lo = s_restore_tmp
149 var s_restore_ttmps_hi = s_restore_alloc_size
150 var s_restore_spi_init_hi_save = s_restore_exec_hi
1065 for var sgpr_idx = 0; sgpr_idx < 16; sgpr_idx ++
1074 for var sgpr_idx = 0; sgpr_idx < 12; sgpr_idx ++
1132 for var rep = 0; rep < 8; rep ++