amd/amdgpu/amdgpu_xcp.c

65 static int amdgpu_xcp_run_transition(struct amdgpu_xcp_mgr *xcp_mgr, int xcp_id,
72 	if (xcp_id >= MAX_XCP || !xcp_mgr->xcp[xcp_id].valid)
75 	xcp = &xcp_mgr->xcp[xcp_id];
86 int amdgpu_xcp_prepare_suspend(struct amdgpu_xcp_mgr *xcp_mgr, int xcp_id)
88 	return amdgpu_xcp_run_transition(xcp_mgr, xcp_id,
92 int amdgpu_xcp_suspend(struct amdgpu_xcp_mgr *xcp_mgr, int xcp_id)
94 	return amdgpu_xcp_run_transition(xcp_mgr, xcp_id, AMDGPU_XCP_SUSPEND);
97 int amdgpu_xcp_prepare_resume(struct amdgpu_xcp_mgr *xcp_mgr, int xcp_id)
99 	return amdgpu_xcp_run_transition(xcp_mgr, xcp_id,
103 int amdgpu_xcp_resume(struct amdgpu_xcp_mgr *xcp_mgr, int xcp_id)
105 	return amdgpu_xcp_run_transition(xcp_mgr, xcp_id, AMDGPU_XCP_RESUME);
108 static void __amdgpu_xcp_add_block(struct amdgpu_xcp_mgr *xcp_mgr, int xcp_id,
116 	xcp = &xcp_mgr->xcp[xcp_id];
421 	fpriv->xcp_id = AMDGPU_XCP_NO_PARTITION;
434 			fpriv->xcp_id = i;
439 	fpriv->vm.mem_id = fpriv->xcp_id == AMDGPU_XCP_NO_PARTITION ? -1 :
440 				adev->xcp_mgr->xcp[fpriv->xcp_id].mem_id;
456 		atomic_dec(&adev->xcp_mgr->xcp[ring->xcp_id].ref_cnt);
470 	if (fpriv->xcp_id == AMDGPU_XCP_NO_PARTITION) {
473 		fpriv->xcp_id = 0;
479 				fpriv->xcp_id = i;
484 	sel_xcp_id = fpriv->xcp_id;
488 			xcp_mgr->xcp[fpriv->xcp_id].gpu_sched[hw_ip][hw_prio].num_scheds;
490 			xcp_mgr->xcp[fpriv->xcp_id].gpu_sched[hw_ip][hw_prio].sched;
505 	int xcp_id;
509 	ring->xcp_id = AMDGPU_XCP_NO_PARTITION;
511 		adev->gfx.enforce_isolation[0].xcp_id = ring->xcp_id;
536 	for (xcp_id = 0; xcp_id < adev->xcp_mgr->num_xcps; xcp_id++) {
537 		if (adev->xcp_mgr->xcp[xcp_id].ip[ip_blk].inst_mask & inst_mask) {
538 			ring->xcp_id = xcp_id;
539 			dev_dbg(adev->dev, "ring:%s xcp_id :%u", ring->name,
540 				ring->xcp_id);
542 				adev->gfx.enforce_isolation[xcp_id].xcp_id = xcp_id;
581 		amdgpu_xcp_gpu_sched_update(adev, ring, ring->xcp_id);
589 			amdgpu_xcp_gpu_sched_update(adev, ring, ring->xcp_id + 1);