41  * Most engines on the GPU are fed via ring buffers.  Ring
47  * pointers are equal, the ring is idle.  When the host
48  * writes commands to the ring buffer, it increments the
56  * @type: ring type for which to return the limit.
74  * amdgpu_ring_alloc - allocate space on the ring buffer
76  * @ring: amdgpu_ring structure holding ring information
77  * @ndw: number of dwords to allocate in the ring buffer
79  * Allocate @ndw dwords in the ring buffer. The number of dwords should be the
80  * sum of all commands written to the ring.
86 int amdgpu_ring_alloc(struct amdgpu_ring *ring, unsigned int ndw)  in amdgpu_ring_alloc()  argument
90 	ndw = (ndw + ring->funcs->align_mask) & ~ring->funcs->align_mask;  in amdgpu_ring_alloc()
95 	if (WARN_ON_ONCE(ndw > ring->max_dw))  in amdgpu_ring_alloc()
98 	ring->count_dw = ndw;  in amdgpu_ring_alloc()
99 	ring->wptr_old = ring->wptr;  in amdgpu_ring_alloc()
101 	if (ring->funcs->begin_use)  in amdgpu_ring_alloc()
102 		ring->funcs->begin_use(ring);  in amdgpu_ring_alloc()
108  * amdgpu_ring_alloc_reemit - allocate space on the ring buffer for reemit
110  * @ring: amdgpu_ring structure holding ring information
111  * @ndw: number of dwords to allocate in the ring buffer
113  * Allocate @ndw dwords in the ring buffer (all asics).
117 static void amdgpu_ring_alloc_reemit(struct amdgpu_ring *ring, unsigned int ndw)  in amdgpu_ring_alloc_reemit()  argument
121 	ndw = (ndw + ring->funcs->align_mask) & ~ring->funcs->align_mask;  in amdgpu_ring_alloc_reemit()
123 	ring->count_dw = ndw;  in amdgpu_ring_alloc_reemit()
124 	ring->wptr_old = ring->wptr;  in amdgpu_ring_alloc_reemit()
126 	if (ring->funcs->begin_use)  in amdgpu_ring_alloc_reemit()
127 		ring->funcs->begin_use(ring);  in amdgpu_ring_alloc_reemit()
133  * @ring: amdgpu_ring structure holding ring information
138 void amdgpu_ring_insert_nop(struct amdgpu_ring *ring, uint32_t count)  in amdgpu_ring_insert_nop()  argument
142 	occupied = ring->wptr & ring->buf_mask;  in amdgpu_ring_insert_nop()
143 	chunk1 = ring->buf_mask + 1 - occupied;  in amdgpu_ring_insert_nop()
148 		memset32(&ring->ring[occupied], ring->funcs->nop, chunk1);  in amdgpu_ring_insert_nop()
151 		memset32(ring->ring, ring->funcs->nop, chunk2);  in amdgpu_ring_insert_nop()
153 	ring->wptr += count;  in amdgpu_ring_insert_nop()
154 	ring->wptr &= ring->ptr_mask;  in amdgpu_ring_insert_nop()
155 	ring->count_dw -= count;  in amdgpu_ring_insert_nop()
161  * @ring: amdgpu_ring structure holding ring information
166 void amdgpu_ring_generic_pad_ib(struct amdgpu_ring *ring, struct amdgpu_ib *ib)  in amdgpu_ring_generic_pad_ib()  argument
168 	u32 align_mask = ring->funcs->align_mask;  in amdgpu_ring_generic_pad_ib()
174 		memset32(&ib->ptr[ib->length_dw], ring->funcs->nop, count);  in amdgpu_ring_generic_pad_ib()
182  * commands on the ring buffer
184  * @ring: amdgpu_ring structure holding ring information
187  * execute new commands on the ring buffer (all asics).
189 void amdgpu_ring_commit(struct amdgpu_ring *ring)  in amdgpu_ring_commit()  argument
193 	if (ring->count_dw < 0)  in amdgpu_ring_commit()
194 		drm_err(adev_to_drm(ring->adev), "writing more dwords to the ring than expected!\n");  in amdgpu_ring_commit()
197 	count = ring->funcs->align_mask + 1 -  in amdgpu_ring_commit()
198 		(ring->wptr & ring->funcs->align_mask);  in amdgpu_ring_commit()
199 	count &= ring->funcs->align_mask;  in amdgpu_ring_commit()
202 		ring->funcs->insert_nop(ring, count);  in amdgpu_ring_commit()
205 	amdgpu_ring_set_wptr(ring);  in amdgpu_ring_commit()
207 	if (ring->funcs->end_use)  in amdgpu_ring_commit()
208 		ring->funcs->end_use(ring);  in amdgpu_ring_commit()
214  * @ring: amdgpu_ring structure holding ring information
218 void amdgpu_ring_undo(struct amdgpu_ring *ring)  in amdgpu_ring_undo()  argument
220 	ring->wptr = ring->wptr_old;  in amdgpu_ring_undo()
222 	if (ring->funcs->end_use)  in amdgpu_ring_undo()
223 		ring->funcs->end_use(ring);  in amdgpu_ring_undo()
226 #define amdgpu_ring_get_gpu_addr(ring, offset)				\  argument
227 	 (ring->adev->wb.gpu_addr + offset * 4)
229 #define amdgpu_ring_get_cpu_addr(ring, offset)				\  argument
230 	 (&ring->adev->wb.wb[offset])
233  * amdgpu_ring_init - init driver ring struct.
236  * @ring: amdgpu_ring structure holding ring information
237  * @max_dw: maximum number of dw for ring alloc
238  * @irq_src: interrupt source to use for this ring
239  * @irq_type: interrupt type to use for this ring
240  * @hw_prio: ring priority (NORMAL/HIGH)
243  * Initialize the driver information for the selected ring (all asics).
246 int amdgpu_ring_init(struct amdgpu_device *adev, struct amdgpu_ring *ring,  in amdgpu_ring_init()  argument
261 	 * KIQ tasks get submitted directly to the ring.  in amdgpu_ring_init()
263 	if (ring->funcs->type == AMDGPU_RING_TYPE_KIQ)  in amdgpu_ring_init()
265 	if (ring->funcs->type == AMDGPU_RING_TYPE_MES)  in amdgpu_ring_init()
267 	else if (ring == &adev->sdma.instance[0].page)  in amdgpu_ring_init()
270 	if (ring->adev == NULL) {  in amdgpu_ring_init()
274 		ring->adev = adev;  in amdgpu_ring_init()
275 		ring->num_hw_submission = sched_hw_submission;  in amdgpu_ring_init()
276 		ring->sched_score = sched_score;  in amdgpu_ring_init()
277 		ring->vmid_wait = dma_fence_get_stub();  in amdgpu_ring_init()
279 		ring->idx = adev->num_rings++;  in amdgpu_ring_init()
280 		adev->rings[ring->idx] = ring;  in amdgpu_ring_init()
282 		r = amdgpu_fence_driver_init_ring(ring);  in amdgpu_ring_init()
287 	r = amdgpu_device_wb_get(adev, &ring->rptr_offs);  in amdgpu_ring_init()
289 		dev_err(adev->dev, "(%d) ring rptr_offs wb alloc failed\n", r);  in amdgpu_ring_init()
293 	r = amdgpu_device_wb_get(adev, &ring->wptr_offs);  in amdgpu_ring_init()
295 		dev_err(adev->dev, "(%d) ring wptr_offs wb alloc failed\n", r);  in amdgpu_ring_init()
299 	r = amdgpu_device_wb_get(adev, &ring->fence_offs);  in amdgpu_ring_init()
301 		dev_err(adev->dev, "(%d) ring fence_offs wb alloc failed\n", r);  in amdgpu_ring_init()
305 	r = amdgpu_device_wb_get(adev, &ring->trail_fence_offs);  in amdgpu_ring_init()
307 		dev_err(adev->dev, "(%d) ring trail_fence_offs wb alloc failed\n", r);  in amdgpu_ring_init()
311 	r = amdgpu_device_wb_get(adev, &ring->cond_exe_offs);  in amdgpu_ring_init()
313 		dev_err(adev->dev, "(%d) ring cond_exec_polling wb alloc failed\n", r);  in amdgpu_ring_init()
317 	ring->fence_gpu_addr =  in amdgpu_ring_init()
318 		amdgpu_ring_get_gpu_addr(ring, ring->fence_offs);  in amdgpu_ring_init()
319 	ring->fence_cpu_addr =  in amdgpu_ring_init()
320 		amdgpu_ring_get_cpu_addr(ring, ring->fence_offs);  in amdgpu_ring_init()
322 	ring->rptr_gpu_addr =  in amdgpu_ring_init()
323 		amdgpu_ring_get_gpu_addr(ring, ring->rptr_offs);  in amdgpu_ring_init()
324 	ring->rptr_cpu_addr =  in amdgpu_ring_init()
325 		amdgpu_ring_get_cpu_addr(ring, ring->rptr_offs);  in amdgpu_ring_init()
327 	ring->wptr_gpu_addr =  in amdgpu_ring_init()
328 		amdgpu_ring_get_gpu_addr(ring, ring->wptr_offs);  in amdgpu_ring_init()
329 	ring->wptr_cpu_addr =  in amdgpu_ring_init()
330 		amdgpu_ring_get_cpu_addr(ring, ring->wptr_offs);  in amdgpu_ring_init()
332 	ring->trail_fence_gpu_addr =  in amdgpu_ring_init()
333 		amdgpu_ring_get_gpu_addr(ring, ring->trail_fence_offs);  in amdgpu_ring_init()
334 	ring->trail_fence_cpu_addr =  in amdgpu_ring_init()
335 		amdgpu_ring_get_cpu_addr(ring, ring->trail_fence_offs);  in amdgpu_ring_init()
337 	ring->cond_exe_gpu_addr =  in amdgpu_ring_init()
338 		amdgpu_ring_get_gpu_addr(ring, ring->cond_exe_offs);  in amdgpu_ring_init()
339 	ring->cond_exe_cpu_addr =  in amdgpu_ring_init()
340 		amdgpu_ring_get_cpu_addr(ring, ring->cond_exe_offs);  in amdgpu_ring_init()
343 	*ring->cond_exe_cpu_addr = 1;  in amdgpu_ring_init()
345 	if (ring->funcs->type != AMDGPU_RING_TYPE_CPER) {  in amdgpu_ring_init()
346 		r = amdgpu_fence_driver_start_ring(ring, irq_src, irq_type);  in amdgpu_ring_init()
352 		max_ibs_dw = ring->funcs->emit_frame_size +  in amdgpu_ring_init()
353 			     amdgpu_ring_max_ibs(ring->funcs->type) * ring->funcs->emit_ib_size;  in amdgpu_ring_init()
354 		max_ibs_dw = (max_ibs_dw + ring->funcs->align_mask) & ~ring->funcs->align_mask;  in amdgpu_ring_init()
359 		ring->ring_size = roundup_pow_of_two(max_dw * 4 * sched_hw_submission);  in amdgpu_ring_init()
361 		ring->ring_size = roundup_pow_of_two(max_dw * 4);  in amdgpu_ring_init()
362 		ring->count_dw = (ring->ring_size - 4) >> 2;  in amdgpu_ring_init()
363 		/* ring buffer is empty now */  in amdgpu_ring_init()
364 		ring->wptr = *ring->rptr_cpu_addr = 0;  in amdgpu_ring_init()
367 	ring->buf_mask = (ring->ring_size / 4) - 1;  in amdgpu_ring_init()
368 	ring->ptr_mask = ring->funcs->support_64bit_ptrs ?  in amdgpu_ring_init()
369 		0xffffffffffffffff : ring->buf_mask;  in amdgpu_ring_init()
371 	ring->cached_rptr = 0;  in amdgpu_ring_init()
373 	if (!ring->ring_backup) {  in amdgpu_ring_init()
374 		ring->ring_backup = kvzalloc(ring->ring_size, GFP_KERNEL);  in amdgpu_ring_init()
375 		if (!ring->ring_backup)  in amdgpu_ring_init()
379 	/* Allocate ring buffer */  in amdgpu_ring_init()
380 	if (ring->ring_obj == NULL) {  in amdgpu_ring_init()
381 		r = amdgpu_bo_create_kernel(adev, ring->ring_size + ring->funcs->extra_bytes,  in amdgpu_ring_init()
384 					    &ring->ring_obj,  in amdgpu_ring_init()
385 					    &ring->gpu_addr,  in amdgpu_ring_init()
386 					    (void **)&ring->ring);  in amdgpu_ring_init()
388 			dev_err(adev->dev, "(%d) ring create failed\n", r);  in amdgpu_ring_init()
389 			kvfree(ring->ring_backup);  in amdgpu_ring_init()
392 		amdgpu_ring_clear_ring(ring);  in amdgpu_ring_init()
395 	ring->max_dw = max_dw;  in amdgpu_ring_init()
396 	ring->hw_prio = hw_prio;  in amdgpu_ring_init()
398 	if (!ring->no_scheduler && ring->funcs->type < AMDGPU_HW_IP_NUM) {  in amdgpu_ring_init()
399 		hw_ip = ring->funcs->type;  in amdgpu_ring_init()
402 			&ring->sched;  in amdgpu_ring_init()
409  * amdgpu_ring_fini - tear down the driver ring struct.
411  * @ring: amdgpu_ring structure holding ring information
413  * Tear down the driver information for the selected ring (all asics).
415 void amdgpu_ring_fini(struct amdgpu_ring *ring)  in amdgpu_ring_fini()  argument
418 	/* Not to finish a ring which is not initialized */  in amdgpu_ring_fini()
419 	if (!(ring->adev) || !(ring->adev->rings[ring->idx]))  in amdgpu_ring_fini()
422 	ring->sched.ready = false;  in amdgpu_ring_fini()
424 	amdgpu_device_wb_free(ring->adev, ring->rptr_offs);  in amdgpu_ring_fini()
425 	amdgpu_device_wb_free(ring->adev, ring->wptr_offs);  in amdgpu_ring_fini()
427 	amdgpu_device_wb_free(ring->adev, ring->cond_exe_offs);  in amdgpu_ring_fini()
428 	amdgpu_device_wb_free(ring->adev, ring->fence_offs);  in amdgpu_ring_fini()
430 	amdgpu_bo_free_kernel(&ring->ring_obj,  in amdgpu_ring_fini()
431 			      &ring->gpu_addr,  in amdgpu_ring_fini()
432 			      (void **)&ring->ring);  in amdgpu_ring_fini()
433 	kvfree(ring->ring_backup);  in amdgpu_ring_fini()
434 	ring->ring_backup = NULL;  in amdgpu_ring_fini()
436 	dma_fence_put(ring->vmid_wait);  in amdgpu_ring_fini()
437 	ring->vmid_wait = NULL;  in amdgpu_ring_fini()
438 	ring->me = 0;  in amdgpu_ring_fini()
442  * amdgpu_ring_emit_reg_write_reg_wait_helper - ring helper
444  * @ring: ring to write to
453 void amdgpu_ring_emit_reg_write_reg_wait_helper(struct amdgpu_ring *ring,  in amdgpu_ring_emit_reg_write_reg_wait_helper()  argument
457 	amdgpu_ring_emit_wreg(ring, reg0, ref);  in amdgpu_ring_emit_reg_write_reg_wait_helper()
458 	amdgpu_ring_emit_reg_wait(ring, reg1, mask, mask);  in amdgpu_ring_emit_reg_write_reg_wait_helper()
462  * amdgpu_ring_soft_recovery - try to soft recover a ring lockup
464  * @ring: ring to try the recovery on
468  * Tries to get a ring proceeding again when it is stuck.
470 bool amdgpu_ring_soft_recovery(struct amdgpu_ring *ring, unsigned int vmid,  in amdgpu_ring_soft_recovery()  argument
479 	if (amdgpu_sriov_vf(ring->adev) || !ring->funcs->soft_recovery || !fence)  in amdgpu_ring_soft_recovery()
489 		ring->funcs->soft_recovery(ring, vmid);  in amdgpu_ring_soft_recovery()
494 		atomic_inc(&ring->adev->gpu_reset_counter);  in amdgpu_ring_soft_recovery()
508 	struct amdgpu_ring *ring = file_inode(f)->i_private;  in amdgpu_ras_cper_debugfs_read()  local
538 	r = amdgpu_ras_mgr_handle_ras_cmd(ring->adev,  in amdgpu_ras_cper_debugfs_read()
552 	r = amdgpu_ras_mgr_handle_ras_cmd(ring->adev, RAS_CMD__GET_CPER_RECORD,  in amdgpu_ras_cper_debugfs_read()
569  * followed by n-words of ring data
574 	struct amdgpu_ring *ring = file_inode(f)->i_private;  in amdgpu_debugfs_ring_read()  local
580 	if (ring->funcs->type == AMDGPU_RING_TYPE_CPER && amdgpu_uniras_enabled(ring->adev))  in amdgpu_debugfs_ring_read()
589 		if (ring->funcs->type == AMDGPU_RING_TYPE_CPER)  in amdgpu_debugfs_ring_read()
590 			mutex_lock(&ring->adev->cper.ring_lock);  in amdgpu_debugfs_ring_read()
592 		early[0] = amdgpu_ring_get_rptr(ring) & ring->buf_mask;  in amdgpu_debugfs_ring_read()
593 		early[1] = amdgpu_ring_get_wptr(ring) & ring->buf_mask;  in amdgpu_debugfs_ring_read()
594 		early[2] = ring->wptr & ring->buf_mask;  in amdgpu_debugfs_ring_read()
608 	if (ring->funcs->type != AMDGPU_RING_TYPE_CPER) {  in amdgpu_debugfs_ring_read()
610 			if (*pos >= (ring->ring_size + 12))  in amdgpu_debugfs_ring_read()
613 			value = ring->ring[(*pos - 12)/4];  in amdgpu_debugfs_ring_read()
627 			size = ring->ring_size - (early[0] - early[1]);  in amdgpu_debugfs_ring_read()
633 			value = ring->ring[p];  in amdgpu_debugfs_ring_read()
644 			p &= ring->ptr_mask;  in amdgpu_debugfs_ring_read()
649 	if (ring->funcs->type == AMDGPU_RING_TYPE_CPER)  in amdgpu_debugfs_ring_read()
650 		mutex_unlock(&ring->adev->cper.ring_lock);  in amdgpu_debugfs_ring_read()
658 	struct amdgpu_ring *ring = file_inode(f)->i_private;  in amdgpu_debugfs_virt_ring_read()  local
663 	if (ring->funcs->type == AMDGPU_RING_TYPE_CPER)  in amdgpu_debugfs_virt_ring_read()
664 		amdgpu_virt_req_ras_cper_dump(ring->adev, false);  in amdgpu_debugfs_virt_ring_read()
684 	struct amdgpu_ring *ring = file_inode(f)->i_private;  in amdgpu_debugfs_mqd_read()  local
685 	ssize_t bytes = min_t(ssize_t, ring->mqd_size - *pos, size);  in amdgpu_debugfs_mqd_read()
686 	void *from = ((u8 *)ring->mqd_ptr) + *pos;  in amdgpu_debugfs_mqd_read()
688 	if (*pos > ring->mqd_size)  in amdgpu_debugfs_mqd_read()
706 	struct amdgpu_ring *ring = data;  in amdgpu_debugfs_ring_error()  local
708 	amdgpu_fence_driver_set_error(ring, val);  in amdgpu_debugfs_ring_error()
718 			      struct amdgpu_ring *ring)  in amdgpu_debugfs_ring_init()  argument
725 	sprintf(name, "amdgpu_ring_%s", ring->name);  in amdgpu_debugfs_ring_init()
727 		debugfs_create_file_size(name, S_IFREG | 0444, root, ring,  in amdgpu_debugfs_ring_init()
729 					 ring->ring_size + 12);  in amdgpu_debugfs_ring_init()
731 		debugfs_create_file_size(name, S_IFREG | 0444, root, ring,  in amdgpu_debugfs_ring_init()
733 					 ring->ring_size + 12);  in amdgpu_debugfs_ring_init()
735 	if (ring->mqd_obj) {  in amdgpu_debugfs_ring_init()
736 		sprintf(name, "amdgpu_mqd_%s", ring->name);  in amdgpu_debugfs_ring_init()
737 		debugfs_create_file_size(name, S_IFREG | 0444, root, ring,  in amdgpu_debugfs_ring_init()
739 					 ring->mqd_size);  in amdgpu_debugfs_ring_init()
742 	sprintf(name, "amdgpu_error_%s", ring->name);  in amdgpu_debugfs_ring_init()
743 	debugfs_create_file(name, 0200, root, ring,  in amdgpu_debugfs_ring_init()
750  * amdgpu_ring_test_helper - tests ring and set sched readiness status
752  * @ring: ring to try the recovery on
754  * Tests ring and set sched readiness status
758 int amdgpu_ring_test_helper(struct amdgpu_ring *ring)  in amdgpu_ring_test_helper()  argument
760 	struct amdgpu_device *adev = ring->adev;  in amdgpu_ring_test_helper()
763 	r = amdgpu_ring_test_ring(ring);  in amdgpu_ring_test_helper()
765 		DRM_DEV_ERROR(adev->dev, "ring %s test failed (%d)\n",  in amdgpu_ring_test_helper()
766 			      ring->name, r);  in amdgpu_ring_test_helper()
768 		DRM_DEV_DEBUG(adev->dev, "ring test on %s succeeded\n",  in amdgpu_ring_test_helper()
769 			      ring->name);  in amdgpu_ring_test_helper()
771 	ring->sched.ready = !r;  in amdgpu_ring_test_helper()
776 static void amdgpu_ring_to_mqd_prop(struct amdgpu_ring *ring,  in amdgpu_ring_to_mqd_prop()  argument
779 	struct amdgpu_device *adev = ring->adev;  in amdgpu_ring_to_mqd_prop()
780 	bool is_high_prio_compute = ring->funcs->type == AMDGPU_RING_TYPE_COMPUTE &&  in amdgpu_ring_to_mqd_prop()
781 				    amdgpu_gfx_is_high_priority_compute_queue(adev, ring);  in amdgpu_ring_to_mqd_prop()
782 	bool is_high_prio_gfx = ring->funcs->type == AMDGPU_RING_TYPE_GFX &&  in amdgpu_ring_to_mqd_prop()
783 				amdgpu_gfx_is_high_priority_graphics_queue(adev, ring);  in amdgpu_ring_to_mqd_prop()
787 	prop->mqd_gpu_addr = ring->mqd_gpu_addr;  in amdgpu_ring_to_mqd_prop()
788 	prop->hqd_base_gpu_addr = ring->gpu_addr;  in amdgpu_ring_to_mqd_prop()
789 	prop->rptr_gpu_addr = ring->rptr_gpu_addr;  in amdgpu_ring_to_mqd_prop()
790 	prop->wptr_gpu_addr = ring->wptr_gpu_addr;  in amdgpu_ring_to_mqd_prop()
791 	prop->queue_size = ring->ring_size;  in amdgpu_ring_to_mqd_prop()
792 	prop->eop_gpu_addr = ring->eop_gpu_addr;  in amdgpu_ring_to_mqd_prop()
793 	prop->use_doorbell = ring->use_doorbell;  in amdgpu_ring_to_mqd_prop()
794 	prop->doorbell_index = ring->doorbell_index;  in amdgpu_ring_to_mqd_prop()
800 	prop->hqd_active = ring->funcs->type == AMDGPU_RING_TYPE_KIQ;  in amdgpu_ring_to_mqd_prop()
809 int amdgpu_ring_init_mqd(struct amdgpu_ring *ring)  in amdgpu_ring_init_mqd()  argument
811 	struct amdgpu_device *adev = ring->adev;  in amdgpu_ring_init_mqd()
815 	amdgpu_ring_to_mqd_prop(ring, &prop);  in amdgpu_ring_init_mqd()
817 	ring->wptr = 0;  in amdgpu_ring_init_mqd()
819 	if (ring->funcs->type == AMDGPU_RING_TYPE_KIQ)  in amdgpu_ring_init_mqd()
822 		mqd_mgr = &adev->mqds[ring->funcs->type];  in amdgpu_ring_init_mqd()
824 	return mqd_mgr->init_mqd(adev, ring->mqd_ptr, &prop);  in amdgpu_ring_init_mqd()
827 void amdgpu_ring_ib_begin(struct amdgpu_ring *ring)  in amdgpu_ring_ib_begin()  argument
829 	if (ring->is_sw_ring)  in amdgpu_ring_ib_begin()
830 		amdgpu_sw_ring_ib_begin(ring);  in amdgpu_ring_ib_begin()
833 void amdgpu_ring_ib_end(struct amdgpu_ring *ring)  in amdgpu_ring_ib_end()  argument
835 	if (ring->is_sw_ring)  in amdgpu_ring_ib_end()
836 		amdgpu_sw_ring_ib_end(ring);  in amdgpu_ring_ib_end()
839 void amdgpu_ring_ib_on_emit_cntl(struct amdgpu_ring *ring)  in amdgpu_ring_ib_on_emit_cntl()  argument
841 	if (ring->is_sw_ring)  in amdgpu_ring_ib_on_emit_cntl()
842 		amdgpu_sw_ring_ib_mark_offset(ring, AMDGPU_MUX_OFFSET_TYPE_CONTROL);  in amdgpu_ring_ib_on_emit_cntl()
845 void amdgpu_ring_ib_on_emit_ce(struct amdgpu_ring *ring)  in amdgpu_ring_ib_on_emit_ce()  argument
847 	if (ring->is_sw_ring)  in amdgpu_ring_ib_on_emit_ce()
848 		amdgpu_sw_ring_ib_mark_offset(ring, AMDGPU_MUX_OFFSET_TYPE_CE);  in amdgpu_ring_ib_on_emit_ce()
851 void amdgpu_ring_ib_on_emit_de(struct amdgpu_ring *ring)  in amdgpu_ring_ib_on_emit_de()  argument
853 	if (ring->is_sw_ring)  in amdgpu_ring_ib_on_emit_de()
854 		amdgpu_sw_ring_ib_mark_offset(ring, AMDGPU_MUX_OFFSET_TYPE_DE);  in amdgpu_ring_ib_on_emit_de()
857 bool amdgpu_ring_sched_ready(struct amdgpu_ring *ring)  in amdgpu_ring_sched_ready()  argument
859 	if (!ring)  in amdgpu_ring_sched_ready()
862 	if (ring->no_scheduler || !drm_sched_wqueue_ready(&ring->sched))  in amdgpu_ring_sched_ready()
868 void amdgpu_ring_reset_helper_begin(struct amdgpu_ring *ring,  in amdgpu_ring_reset_helper_begin()  argument
872 	amdgpu_ring_backup_unprocessed_commands(ring, guilty_fence);  in amdgpu_ring_reset_helper_begin()
875 int amdgpu_ring_reset_helper_end(struct amdgpu_ring *ring,  in amdgpu_ring_reset_helper_end()  argument
881 	/* verify that the ring is functional */  in amdgpu_ring_reset_helper_end()
882 	r = amdgpu_ring_test_ring(ring);  in amdgpu_ring_reset_helper_end()
890 	if (ring->ring_backup_entries_to_copy) {  in amdgpu_ring_reset_helper_end()
891 		amdgpu_ring_alloc_reemit(ring, ring->ring_backup_entries_to_copy);  in amdgpu_ring_reset_helper_end()
892 		for (i = 0; i < ring->ring_backup_entries_to_copy; i++)  in amdgpu_ring_reset_helper_end()
893 			amdgpu_ring_write(ring, ring->ring_backup[i]);  in amdgpu_ring_reset_helper_end()
894 		amdgpu_ring_commit(ring);  in amdgpu_ring_reset_helper_end()
899 bool amdgpu_ring_is_reset_type_supported(struct amdgpu_ring *ring,  in amdgpu_ring_is_reset_type_supported()  argument
902 	switch (ring->funcs->type) {  in amdgpu_ring_is_reset_type_supported()
904 		if (ring->adev->gfx.gfx_supported_reset & reset_type)  in amdgpu_ring_is_reset_type_supported()
908 		if (ring->adev->gfx.compute_supported_reset & reset_type)  in amdgpu_ring_is_reset_type_supported()
912 		if (ring->adev->sdma.supported_reset & reset_type)  in amdgpu_ring_is_reset_type_supported()
917 		if (ring->adev->vcn.supported_reset & reset_type)  in amdgpu_ring_is_reset_type_supported()
921 		if (ring->adev->jpeg.supported_reset & reset_type)  in amdgpu_ring_is_reset_type_supported()