272 	__encode_table_header_to_buf(&control->tbl_hdr, buf);  in __write_table_header()
368 	sz = sizeof(control->tbl_hdr) - sizeof(control->tbl_hdr.checksum);  in __calc_hdr_byte_sum()
369 	pp = (u8 *) &control->tbl_hdr;  in __calc_hdr_byte_sum()
396 	struct amdgpu_ras_eeprom_table_header *hdr = &control->tbl_hdr;  in amdgpu_ras_eeprom_correct_header_tag()
420 	struct amdgpu_ras_eeprom_table_header *hdr = &control->tbl_hdr;  in amdgpu_ras_set_eeprom_table_version()
446 	struct amdgpu_ras_eeprom_table_header *hdr = &control->tbl_hdr;  in amdgpu_ras_eeprom_reset_table()
593 	if (con->eeprom_control.tbl_hdr.header == RAS_TABLE_HDR_BAD) {  in amdgpu_ras_eeprom_check_err_threshold()
798 			control->tbl_hdr.header = RAS_TABLE_HDR_BAD;  in amdgpu_ras_eeprom_update_header()
799 			if (control->tbl_hdr.version >= RAS_TABLE_VER_V2_1) {  in amdgpu_ras_eeprom_update_header()
810 	if (control->tbl_hdr.version >= RAS_TABLE_VER_V2_1)  in amdgpu_ras_eeprom_update_header()
811 		control->tbl_hdr.tbl_size = RAS_TABLE_HEADER_SIZE +  in amdgpu_ras_eeprom_update_header()
815 		control->tbl_hdr.tbl_size = RAS_TABLE_HEADER_SIZE +  in amdgpu_ras_eeprom_update_header()
817 	control->tbl_hdr.checksum = 0;  in amdgpu_ras_eeprom_update_header()
824 			control->tbl_hdr.tbl_size);  in amdgpu_ras_eeprom_update_header()
850 	    control->tbl_hdr.version >= RAS_TABLE_VER_V2_1 &&  in amdgpu_ras_eeprom_update_header()
863 	if (control->tbl_hdr.version >= RAS_TABLE_VER_V2_1)  in amdgpu_ras_eeprom_update_header()
867 	control->tbl_hdr.checksum = csum;  in amdgpu_ras_eeprom_update_header()
869 	if (!res && control->tbl_hdr.version > RAS_TABLE_VER_V1)  in amdgpu_ras_eeprom_update_header()
1196 	if (control->tbl_hdr.version >= RAS_TABLE_VER_V2_1)  in amdgpu_ras_eeprom_max_record_count()
1308 			 control->tbl_hdr.header,  in amdgpu_ras_debugfs_table_read()
1309 			 control->tbl_hdr.version,  in amdgpu_ras_debugfs_table_read()
1310 			 control->tbl_hdr.first_rec_offset,  in amdgpu_ras_debugfs_table_read()
1311 			 control->tbl_hdr.tbl_size,  in amdgpu_ras_debugfs_table_read()
1312 			 control->tbl_hdr.checksum);  in amdgpu_ras_debugfs_table_read()
1445 	if (control->tbl_hdr.version >= RAS_TABLE_VER_V2_1)  in __verify_ras_table_checksum()
1519 	struct amdgpu_ras_eeprom_table_header *hdr = &control->tbl_hdr;  in amdgpu_ras_smu_eeprom_init()
1556 	struct amdgpu_ras_eeprom_table_header *hdr = &control->tbl_hdr;  in amdgpu_ras_eeprom_init()
1673 	struct amdgpu_ras_eeprom_table_header *hdr = &control->tbl_hdr;  in amdgpu_ras_eeprom_check()