Lines Matching defs:places

114 	struct ttm_place *places = abo->placements;
123 			places[c].fpfn = adev->gmc.mem_partitions[mem_id].range.fpfn;
128 			places[c].lpfn = adev->gmc.mem_partitions[mem_id].range.lpfn + 1;
130 			places[c].fpfn = 0;
131 			places[c].lpfn = 0;
133 		places[c].mem_type = TTM_PL_VRAM;
134 		places[c].flags = 0;
137 			places[c].lpfn = min_not_zero(places[c].lpfn, visible_pfn);
139 			places[c].flags |= TTM_PL_FLAG_TOPDOWN;
143 			places[c].flags |= TTM_PL_FLAG_CONTIGUOUS;
149 		places[c].fpfn = 0;
150 		places[c].lpfn = 0;
151 		places[c].mem_type = AMDGPU_PL_DOORBELL;
152 		places[c].flags = 0;
157 		places[c].fpfn = 0;
158 		places[c].lpfn = 0;
159 		places[c].mem_type =
162 		places[c].flags = 0;
169 			places[c].flags |= TTM_PL_FLAG_FALLBACK;
174 		places[c].fpfn = 0;
175 		places[c].lpfn = 0;
176 		places[c].mem_type = TTM_PL_SYSTEM;
177 		places[c].flags = 0;
182 		places[c].fpfn = 0;
183 		places[c].lpfn = 0;
184 		places[c].mem_type = AMDGPU_PL_GDS;
185 		places[c].flags = 0;
190 		places[c].fpfn = 0;
191 		places[c].lpfn = 0;
192 		places[c].mem_type = AMDGPU_PL_GWS;
193 		places[c].flags = 0;
198 		places[c].fpfn = 0;
199 		places[c].lpfn = 0;
200 		places[c].mem_type = AMDGPU_PL_OA;
201 		places[c].flags = 0;
206 		places[c].fpfn = 0;
207 		places[c].lpfn = 0;
208 		places[c].mem_type = TTM_PL_SYSTEM;
209 		places[c].flags = 0;
216 	placement->placement = places;