drivers/gpio/gpio-thunderx.c

49 	unsigned int		line;
56 	struct msix_entry	*msix_entries;	/* per line MSI-X */
57 	struct thunderx_line	*line_entries;	/* per line irq info */
64 static unsigned int bit_cfg_reg(unsigned int line)
66 	return 8 * line + GPIO_BIT_CFG;
69 static unsigned int intr_reg(unsigned int line)
71 	return 8 * line + GPIO_INTR;
75 					 unsigned int line)
77 	u64 bit_cfg = readq(txgpio->register_base + bit_cfg_reg(line));
87 				  unsigned int line)
89 	bool rv = thunderx_gpio_is_gpio_nowarn(txgpio, line);
91 	WARN_RATELIMIT(!rv, "Pin %d not available for GPIO\n", line);
96 static int thunderx_gpio_request(struct gpio_chip *chip, unsigned int line)
100 	return thunderx_gpio_is_gpio(txgpio, line) ? 0 : -EIO;
103 static int thunderx_gpio_dir_in(struct gpio_chip *chip, unsigned int line)
107 	if (!thunderx_gpio_is_gpio(txgpio, line))
111 	clear_bit(line, txgpio->invert_mask);
112 	clear_bit(line, txgpio->od_mask);
113 	writeq(txgpio->line_entries[line].fil_bits,
114 	       txgpio->register_base + bit_cfg_reg(line));
119 static int thunderx_gpio_set(struct gpio_chip *chip, unsigned int line,
123 	int bank = line / 64;
124 	int bank_bit = line % 64;
134 static int thunderx_gpio_dir_out(struct gpio_chip *chip, unsigned int line,
138 	u64 bit_cfg = txgpio->line_entries[line].fil_bits | GPIO_BIT_CFG_TX_OE;
140 	if (!thunderx_gpio_is_gpio(txgpio, line))
145 	thunderx_gpio_set(chip, line, value);
147 	if (test_bit(line, txgpio->invert_mask))
150 	if (test_bit(line, txgpio->od_mask))
153 	writeq(bit_cfg, txgpio->register_base + bit_cfg_reg(line));
159 static int thunderx_gpio_get_direction(struct gpio_chip *chip, unsigned int line)
164 	if (!thunderx_gpio_is_gpio_nowarn(txgpio, line))
172 	bit_cfg = readq(txgpio->register_base + bit_cfg_reg(line));
181 				    unsigned int line,
187 	int bank = line / 64;
188 	int bank_bit = line % 64;
193 	if (!thunderx_gpio_is_gpio(txgpio, line))
197 	orig_invert = test_bit(line, txgpio->invert_mask);
199 	orig_od = test_bit(line, txgpio->od_mask);
202 	bit_cfg = readq(txgpio->register_base + bit_cfg_reg(line));
210 		set_bit(line, txgpio->invert_mask);
212 		set_bit(line, txgpio->od_mask);
217 		clear_bit(line, txgpio->invert_mask);
219 		clear_bit(line, txgpio->od_mask);
236 		txgpio->line_entries[line].fil_bits =
240 		bit_cfg |= txgpio->line_entries[line].fil_bits;
241 		writeq(bit_cfg, txgpio->register_base + bit_cfg_reg(line));
255 		ret = thunderx_gpio_dir_out(chip, line, orig_dat ^ new_invert);
260 static int thunderx_gpio_get(struct gpio_chip *chip, unsigned int line)
263 	int bank = line / 64;
264 	int bank_bit = line % 64;
268 	if (test_bit(line, txgpio->invert_mask))
351 		set_bit(txline->line, txgpio->invert_mask);
353 		clear_bit(txline->line, txgpio->invert_mask);
355 	clear_bit(txline->line, txgpio->od_mask);
356 	writeq(bit_cfg, txgpio->register_base + bit_cfg_reg(txline->line));
503 		txgpio->line_entries[i].line = i;
553 	/* Push on irq_data and the domain for each line. */