Lines Matching defs:irq_mask_all
482 u32 irq_mask_all = 0;
495 irq_mask_all |= dmc520_irq_configs[idx].mask;
500 if (!irq_mask_all) {
553 dmc520_write_reg(pvt, reg_val & (~irq_mask_all),
555 dmc520_write_reg(pvt, irq_mask_all, REG_OFFSET_INTERRUPT_CLR);
573 if (irq_mask_all & DRAM_ECC_INT_CE_BIT)
576 if (irq_mask_all & DRAM_ECC_INT_UE_BIT)
587 dmc520_write_reg(pvt, reg_val | irq_mask_all,
605 u32 reg_val, idx, irq_mask_all = 0;
614 dmc520_write_reg(pvt, reg_val & (~irq_mask_all),
620 irq_mask_all |= pvt->masks[idx];