Lines Matching refs:omap_dma_glbl_write

351 static void omap_dma_glbl_write(struct omap_dmadev *od, unsigned reg, unsigned val)
502 		omap_dma_glbl_write(od, OCP_SYSCONFIG, val);
511 		omap_dma_glbl_write(od, OCP_SYSCONFIG, sysconfig);
661 		omap_dma_glbl_write(od, IRQSTATUS_L1, mask);
731 			omap_dma_glbl_write(od, IRQSTATUS_L1, val);
733 			omap_dma_glbl_write(od, IRQENABLE_L1, od->irq_enable_mask);
737 			omap_dma_glbl_write(od, IRQENABLE_L0, val);
768 		omap_dma_glbl_write(od, IRQENABLE_L1, od->irq_enable_mask);
1587 	omap_dma_glbl_write(od, GCR, od->context.gcr);
1588 	omap_dma_glbl_write(od, OCP_SYSCONFIG, od->context.ocp_sysconfig);
1589 	omap_dma_glbl_write(od, IRQENABLE_L0, od->context.irqenable_l0);
1590 	omap_dma_glbl_write(od, IRQENABLE_L1, od->context.irqenable_l1);
1594 		omap_dma_glbl_write(od, IRQSTATUS_L0, 0);
1643 	omap_dma_glbl_write(od, GCR, val);
1778 		omap_dma_glbl_write(od, IRQENABLE_L1, 0);
1864 		omap_dma_glbl_write(od, IRQENABLE_L0, 0);