dma/stm32/stm32-dma3.c

472 	u32 sdw = 1 << FIELD_GET(CTR1_SDW_LOG2, ctr1);
479 	if (bndt % sdw)
483 	if (csar % sdw)
487 	if (sdw == DMA_SLAVE_BUSWIDTH_8_BYTES && port_is_ahb(ddata->ports_max_dw[sap]))
569 	u32 sdw, ddw, sbl_max, dbl_max, tcem, init_dw, init_bl_max;
579 	sdw = chan->dma_config.src_addr_width ? : get_chan_max_dw(sap, chan->max_burst);
585 	if (!(dma_device.src_addr_widths & BIT(sdw)) || !(dma_device.dst_addr_widths & BIT(ddw))) {
586 		dev_err(chan2dev(chan), "Bus width (src=%u, dst=%u) not supported\n", sdw, ddw);
597 	if ((port_is_ahb(sap_max_dw) && sdw == DMA_SLAVE_BUSWIDTH_8_BYTES) ||
601 			sdw, ddw, sap, dap);
640 		sdw = stm32_dma3_get_max_dw(chan->max_burst, sap_max_dw, len, src_addr);
641 		sbl_max = stm32_dma3_get_max_burst(len, sdw, chan->max_burst, src_max_burst);
643 			sdw = ddw;
647 		_ctr1 |= FIELD_PREP(CTR1_SDW_LOG2, ilog2(sdw));
652 		if (ddw != sdw) {
669 		sdw = min_t(u32, sdw, stm32_dma3_get_max_dw(chan->max_burst, sap_max_dw,
671 		sbl_max = min_t(u32, sbl_max, stm32_dma3_get_max_burst(len, sdw, chan->max_burst,
678 		    ((_ctr2 & CTR2_PFREQ) && ddw > sdw)) { /* Packing to wider ddw not supported */
679 			ddw = sdw;
683 		_ctr1 |= FIELD_PREP(CTR1_SDW_LOG2, ilog2(sdw));
688 		if (ddw != sdw) {
705 		init_dw = sdw;
707 		sdw = stm32_dma3_get_max_dw(chan->max_burst, sap_max_dw, len, src_addr);
708 		sbl_max = stm32_dma3_get_max_burst(len, sdw, chan->max_burst, src_max_burst);
710 			sdw = min_t(u32, init_dw, sdw);
711 			sbl_max = min_t(u32, init_bl_max, stm32_dma3_get_max_burst(len, sdw,
728 		_ctr1 |= FIELD_PREP(CTR1_SDW_LOG2, ilog2(sdw));
733 		if (ddw != sdw) {
758 	dev_dbg(chan2dev(chan), "%s: sdw=%u bytes sbl=%u beats ddw=%u bytes dbl=%u beats\n",
759 		__func__, sdw, sbl_max, ddw, dbl_max);