drivers/dma/fsl-qdma.c

141  *			    descriptor format with qDMA.
150  *			    by qDMA and dynamic debug field.
152  * @cmd:		    Command for QDMA (see FSL_QDMA_CMD_RWTTYPE and
175 /* qDMA status notification pre information */
187 	struct fsl_qdma_engine		*qdma;
291 static u32 qdma_readl(struct fsl_qdma_engine *qdma, void __iomem *addr)
293 	return FSL_DMA_IN(qdma, addr, 32);
296 static void qdma_writel(struct fsl_qdma_engine *qdma, u32 val,
299 	FSL_DMA_OUT(qdma, addr, val, 32);
316 	struct fsl_qdma_engine *fsl_qdma = fsl_chan->qdma;
794 		dev_err(fsl_qdma->dma_dev.dev, "QDMA: status err!\n");
814 		platform_get_irq_byname(pdev, "qdma-error");
820 			       "qDMA error", fsl_qdma);
822 		dev_err(&pdev->dev, "Can't register qDMA controller IRQ.\n");
827 		sprintf(irq_name, "qdma-queue%d", i);
838 				       "qDMA queue",
842 				"Can't register qDMA queue IRQ.\n");
880 	/* Try to halt the qDMA engine first. */
999 	reg = qdma_readl(fsl_chan->qdma, block + FSL_QDMA_BCQSR(fsl_queue->id));
1015 	reg = qdma_readl(fsl_chan->qdma, block + FSL_QDMA_BCQMR(fsl_queue->id));
1017 	qdma_writel(fsl_chan->qdma, reg, block + FSL_QDMA_BCQMR(fsl_queue->id));
1073 	struct fsl_qdma_engine *fsl_qdma = fsl_chan->qdma;
1203 	fsl_qdma->irq_base = platform_get_irq_byname(pdev, "qdma-queue0");
1213 		fsl_chan->qdma = fsl_qdma;
1243 		dev_err(&pdev->dev, "Can't Initialize the qDMA engine.\n");
1253 		dev_err(&pdev->dev, "Can't register NXP Layerscape qDMA engine.\n");
1283 	{ .compatible = "fsl,ls1021a-qdma", },
1290 		.name	= "fsl-qdma",
1299 MODULE_ALIAS("platform:fsl-qdma");
1301 MODULE_DESCRIPTION("NXP Layerscape qDMA engine driver");