qat/qat_common/adf_transport.c

40 static int adf_reserve_ring(struct adf_etr_bank_data *bank, u32 ring)
43 	if (bank->ring_mask & (1 << ring)) {
47 	bank->ring_mask |= (1 << ring);
52 static void adf_unreserve_ring(struct adf_etr_bank_data *bank, u32 ring)
55 	bank->ring_mask &= ~(1 << ring);
59 static void adf_enable_ring_irq(struct adf_etr_bank_data *bank, u32 ring)
64 	bank->irq_mask |= (1 << ring);
72 static void adf_disable_ring_irq(struct adf_etr_bank_data *bank, u32 ring)
77 	bank->irq_mask &= ~(1 << ring);
83 bool adf_ring_nearly_full(struct adf_etr_ring_data *ring)
85 	return atomic_read(ring->inflights) > ring->threshold;
88 int adf_send_message(struct adf_etr_ring_data *ring, u32 *msg)
90 	struct adf_hw_csr_ops *csr_ops = GET_CSR_OPS(ring->bank->accel_dev);
92 	if (atomic_add_return(1, ring->inflights) >
93 	    ADF_MAX_INFLIGHTS(ring->ring_size, ring->msg_size)) {
94 		atomic_dec(ring->inflights);
97 	spin_lock_bh(&ring->lock);
98 	memcpy((void *)((uintptr_t)ring->base_addr + ring->tail), msg,
99 	       ADF_MSG_SIZE_TO_BYTES(ring->msg_size));
101 	ring->tail = adf_modulo(ring->tail +
102 				ADF_MSG_SIZE_TO_BYTES(ring->msg_size),
103 				ADF_RING_SIZE_MODULO(ring->ring_size));
104 	csr_ops->write_csr_ring_tail(ring->bank->csr_addr,
105 				     ring->bank->bank_number, ring->ring_number,
106 				     ring->tail);
107 	spin_unlock_bh(&ring->lock);
112 static int adf_handle_response(struct adf_etr_ring_data *ring)
114 	struct adf_hw_csr_ops *csr_ops = GET_CSR_OPS(ring->bank->accel_dev);
116 	u32 *msg = (u32 *)((uintptr_t)ring->base_addr + ring->head);
119 		ring->callback((u32 *)msg);
120 		atomic_dec(ring->inflights);
122 		ring->head = adf_modulo(ring->head +
123 					ADF_MSG_SIZE_TO_BYTES(ring->msg_size),
124 					ADF_RING_SIZE_MODULO(ring->ring_size));
126 		msg = (u32 *)((uintptr_t)ring->base_addr + ring->head);
129 		csr_ops->write_csr_ring_head(ring->bank->csr_addr,
130 					     ring->bank->bank_number,
131 					     ring->ring_number, ring->head);
136 static void adf_configure_tx_ring(struct adf_etr_ring_data *ring)
138 	struct adf_hw_csr_ops *csr_ops = GET_CSR_OPS(ring->bank->accel_dev);
139 	u32 ring_config = BUILD_RING_CONFIG(ring->ring_size);
141 	csr_ops->write_csr_ring_config(ring->bank->csr_addr,
142 				       ring->bank->bank_number,
143 				       ring->ring_number, ring_config);
147 static void adf_configure_rx_ring(struct adf_etr_ring_data *ring)
149 	struct adf_hw_csr_ops *csr_ops = GET_CSR_OPS(ring->bank->accel_dev);
151 			BUILD_RESP_RING_CONFIG(ring->ring_size,
155 	csr_ops->write_csr_ring_config(ring->bank->csr_addr,
156 				       ring->bank->bank_number,
157 				       ring->ring_number, ring_config);
160 static int adf_init_ring(struct adf_etr_ring_data *ring)
162 	struct adf_etr_bank_data *bank = ring->bank;
168 			ADF_SIZE_TO_RING_SIZE_IN_BYTES(ring->ring_size);
171 	ring->base_addr = dma_alloc_coherent(&GET_DEV(accel_dev),
172 					     ring_size_bytes, &ring->dma_addr,
174 	if (!ring->base_addr)
177 	memset(ring->base_addr, 0x7F, ring_size_bytes);
179 	if (adf_check_ring_alignment(ring->dma_addr, ring_size_bytes)) {
182 				  ring->base_addr, ring->dma_addr);
183 		ring->base_addr = NULL;
187 	if (hw_data->tx_rings_mask & (1 << ring->ring_number))
188 		adf_configure_tx_ring(ring);
191 		adf_configure_rx_ring(ring);
193 	ring_base = csr_ops->build_csr_ring_base_addr(ring->dma_addr,
194 						      ring->ring_size);
196 	csr_ops->write_csr_ring_base(ring->bank->csr_addr,
197 				     ring->bank->bank_number, ring->ring_number,
199 	spin_lock_init(&ring->lock);
203 static void adf_cleanup_ring(struct adf_etr_ring_data *ring)
206 			ADF_SIZE_TO_RING_SIZE_IN_BYTES(ring->ring_size);
209 	if (ring->base_addr) {
210 		memset(ring->base_addr, 0x7F, ring_size_bytes);
211 		dma_free_coherent(&GET_DEV(ring->bank->accel_dev),
212 				  ring_size_bytes, ring->base_addr,
213 				  ring->dma_addr);
226 	struct adf_etr_ring_data *ring;
243 			"Invalid ring size for given msg size\n");
252 		dev_err(&GET_DEV(accel_dev), "Can't get ring number\n");
256 		dev_err(&GET_DEV(accel_dev), "Invalid ring number\n");
267 	ring = &bank->rings[ring_num];
268 	ring->ring_number = ring_num;
269 	ring->bank = bank;
270 	ring->callback = callback;
271 	ring->msg_size = ADF_BYTES_TO_MSG_SIZE(msg_size);
272 	ring->ring_size = adf_verify_ring_size(msg_size, num_msgs);
273 	ring->head = 0;
274 	ring->tail = 0;
275 	max_inflights = ADF_MAX_INFLIGHTS(ring->ring_size, ring->msg_size);
276 	ring->threshold = ADF_PERCENT(max_inflights, ADF_MAX_RING_THRESHOLD);
277 	atomic_set(ring->inflights, 0);
278 	ret = adf_init_ring(ring);
282 	/* Enable HW arbitration for the given ring */
283 	adf_update_ring_arb(ring);
285 	if (adf_ring_debugfs_add(ring, ring_name)) {
287 			"Couldn't add ring debugfs entry\n");
294 		adf_enable_ring_irq(bank, ring->ring_number);
295 	*ring_ptr = ring;
298 	adf_cleanup_ring(ring);
300 	adf_update_ring_arb(ring);
304 void adf_remove_ring(struct adf_etr_ring_data *ring)
306 	struct adf_etr_bank_data *bank = ring->bank;
309 	/* Disable interrupts for the given ring */
310 	adf_disable_ring_irq(bank, ring->ring_number);
315 				       ring->ring_number, 0);
317 				     ring->ring_number, 0);
318 	adf_ring_debugfs_rm(ring);
319 	adf_unreserve_ring(bank, ring->ring_number);
320 	/* Disable HW arbitration for the given ring */
321 	adf_update_ring_arb(ring);
322 	adf_cleanup_ring(ring);
392 	struct adf_etr_ring_data *ring;
425 		ring = &bank->rings[i];
427 			ring->inflights =
431 			if (!ring->inflights)
440 			ring->inflights = tx_ring->inflights;
456 		ring = &bank->rings[i];
457 		kfree(ring->inflights);
458 		ring->inflights = NULL;
530 		struct adf_etr_ring_data *ring = &bank->rings[i];
533 			adf_cleanup_ring(ring);
536 			kfree(ring->inflights);